redonkable
/
alistair23-linux
1
0
Fork 0
Code Releases Activity

arm64: dts: imx8qxp-mek: Add LVDS0/1 PWM backlight support 

This patch adds LVDS0/1 PWM backlight support
for the i.MX8QXP MEK platform.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Liu Ying 2019-11-14 16:27:15 +08:00 committed by Dong Aisheng
parent cf3eb6cd8f
commit 22087da0d6
1 changed files with 60 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

60
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
View File

@ -24,6 +24,42 @@
pinctrl-2 = <&pinctrl_wifi>;
};
lvds_backlight0: lvds_backlight@0 {
compatible = "pwm-backlight";
pwms = <&pwm_mipi_lvds0 0 100000 0>;
brightness-levels = < 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100>;
default-brightness-level = <80>;
};
lvds_backlight1: lvds_backlight@1 {
compatible = "pwm-backlight";
pwms = <&pwm_mipi_lvds1 0 100000 0>;
brightness-levels = < 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100>;
default-brightness-level = <80>;
};
memory@80000000 {
device_type = "memory";
reg = <0x00000000 0x80000000 0 0x40000000>;
@ -368,6 +404,12 @@
status = "okay";
};
&pwm_mipi_lvds0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm_mipi_lvds0>;
status = "okay";
};
&i2c0_mipi_lvds0 {
#address-cells = <1>;
#size-cells = <0>;
@ -411,6 +453,12 @@
};
};
&pwm_mipi_lvds1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm_mipi_lvds1>;
status = "okay";
};
&i2c0_mipi_lvds1 {
#address-cells = <1>;
#size-cells = <0>;
@ -1176,6 +1224,18 @@
>;
};
pinctrl_pwm_mipi_lvds0: mipi_lvds0_pwm_grp {
fsl,pins = <
IMX8QXP_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PWM0_OUT 0x00000020
>;
};
pinctrl_pwm_mipi_lvds1: mipi_lvds1_pwm_grp {
fsl,pins = <
IMX8QXP_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PWM0_OUT 0x00000020
>;
};
pinctrl_sai1: sai1grp {
fsl,pins = <
IMX8QXP_SAI1_RXD_ADMA_SAI1_RXD 0x06000040