s390/sclp: convert early sclp console code to C
The 31-bit assembler code for the early sclp console is error prone as git commit fde24b54d976cc123506695c17db01438a11b673 "s390/sclp: clear upper register halves in _sclp_print_early" has shown. Convert the assembler code to C. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>hifive-unleashed-5.1
Martin Schwidefsky
parent
1d2334cb7d
commit
22362a0e23
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@ -33,6 +33,8 @@ mflags-$(CONFIG_MARCH_Z196) := -march=z196
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mflags-$(CONFIG_MARCH_ZEC12) := -march=zEC12
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mflags-$(CONFIG_MARCH_Z13) := -march=z13
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export CC_FLAGS_MARCH := $(mflags-y)
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aflags-y += $(mflags-y)
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cflags-y += $(mflags-y)
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@ -232,6 +232,17 @@ static inline void __load_psw_mask (unsigned long mask)
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: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
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}
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/*
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* Extract current PSW mask
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*/
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static inline unsigned long __extract_psw(void)
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{
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unsigned int reg1, reg2;
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asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
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return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
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}
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/*
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* Rewind PSW instruction address by specified number of bytes.
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*/
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@ -79,6 +79,6 @@ int sclp_pci_configure(u32 fid);
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int sclp_pci_deconfigure(u32 fid);
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int memcpy_hsa(void *dest, unsigned long src, size_t count, int mode);
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void sclp_early_detect(void);
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long _sclp_print_early(const char *);
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int _sclp_print_early(const char *);
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#endif /* _ASM_S390_SCLP_H */
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@ -28,6 +28,17 @@ CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"'
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CFLAGS_sysinfo.o += -w
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#
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# Use -march=z900 for sclp.c to be able to print an error message if
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# the kernel is started on a machine which is too old
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#
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CFLAGS_REMOVE_sclp.o = $(CC_FLAGS_FTRACE)
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ifneq ($(CC_FLAGS_MARCH),-march=z900)
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CFLAGS_REMOVE_sclp.o += $(CC_FLAGS_MARCH)
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CFLAGS_sclp.o += -march=z900
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endif
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GCOV_PROFILE_sclp.o := n
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obj-y := traps.o time.o process.o base.o early.o setup.o idle.o vtime.o
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obj-y += processor.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o nmi.o
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obj-y += debug.o irq.o ipl.o dis.o diag.o sclp.o vdso.o
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@ -370,6 +370,7 @@ ENTRY(startup_kdump)
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xc 0x200(256),0x200 # partially clear lowcore
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xc 0x300(256),0x300
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xc 0xe00(256),0xe00
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lctlg %c0,%c15,0x200(%r0) # initialize control registers
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stck __LC_LAST_UPDATE_CLOCK
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spt 6f-.LPG0(%r13)
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mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)
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@ -1,355 +0,0 @@
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/*
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* Mini SCLP driver.
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*
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* Copyright IBM Corp. 2004, 2009
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*
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* Author(s): Peter Oberparleiter <Peter.Oberparleiter@de.ibm.com>,
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* Heiko Carstens <heiko.carstens@de.ibm.com>,
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*
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*/
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#include <linux/linkage.h>
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#include <asm/irq.h>
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LC_EXT_NEW_PSW = 0x58 # addr of ext int handler
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LC_EXT_NEW_PSW_64 = 0x1b0 # addr of ext int handler 64 bit
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LC_EXT_INT_PARAM = 0x80 # addr of ext int parameter
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LC_EXT_INT_CODE = 0x86 # addr of ext int code
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LC_AR_MODE_ID = 0xa3
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#
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# Subroutine which waits synchronously until either an external interruption
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# or a timeout occurs.
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#
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# Parameters:
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# R2 = 0 for no timeout, non-zero for timeout in (approximated) seconds
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#
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# Returns:
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# R2 = 0 on interrupt, 2 on timeout
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# R3 = external interruption parameter if R2=0
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#
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_sclp_wait_int:
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stm %r6,%r15,24(%r15) # save registers
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basr %r13,0 # get base register
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.LbaseS1:
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ahi %r15,-96 # create stack frame
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la %r8,LC_EXT_NEW_PSW # register int handler
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la %r9,.LextpswS1-.LbaseS1(%r13)
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tm LC_AR_MODE_ID,1
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jno .Lesa1
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la %r8,LC_EXT_NEW_PSW_64 # register int handler 64 bit
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la %r9,.LextpswS1_64-.LbaseS1(%r13)
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.Lesa1:
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mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8)
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mvc 0(16,%r8),0(%r9)
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epsw %r6,%r7 # set current addressing mode
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nill %r6,0x1 # in new psw (31 or 64 bit mode)
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nilh %r7,0x8000
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stm %r6,%r7,0(%r8)
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lhi %r6,0x0200 # cr mask for ext int (cr0.54)
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ltr %r2,%r2
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jz .LsetctS1
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ahi %r6,0x0800 # cr mask for clock int (cr0.52)
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stck .LtimeS1-.LbaseS1(%r13) # initiate timeout
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al %r2,.LtimeS1-.LbaseS1(%r13)
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st %r2,.LtimeS1-.LbaseS1(%r13)
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sckc .LtimeS1-.LbaseS1(%r13)
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.LsetctS1:
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stctl %c0,%c0,.LctlS1-.LbaseS1(%r13) # enable required interrupts
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l %r0,.LctlS1-.LbaseS1(%r13)
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lhi %r1,~(0x200 | 0x800) # clear old values
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nr %r1,%r0
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or %r1,%r6 # set new value
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st %r1,.LctlS1-.LbaseS1(%r13)
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lctl %c0,%c0,.LctlS1-.LbaseS1(%r13)
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st %r0,.LctlS1-.LbaseS1(%r13)
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lhi %r2,2 # return code for timeout
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.LloopS1:
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lpsw .LwaitpswS1-.LbaseS1(%r13) # wait until interrupt
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.LwaitS1:
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lh %r7,LC_EXT_INT_CODE
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chi %r7,EXT_IRQ_CLK_COMP # timeout?
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je .LtimeoutS1
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chi %r7,EXT_IRQ_SERVICE_SIG # service int?
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jne .LloopS1
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sr %r2,%r2
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l %r3,LC_EXT_INT_PARAM
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.LtimeoutS1:
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lctl %c0,%c0,.LctlS1-.LbaseS1(%r13) # restore interrupt setting
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# restore old handler
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mvc 0(16,%r8),.LoldpswS1-.LbaseS1(%r13)
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lm %r6,%r15,120(%r15) # restore registers
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br %r14 # return to caller
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.align 8
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.LoldpswS1:
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.long 0, 0, 0, 0 # old ext int PSW
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.LextpswS1:
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.long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
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.LextpswS1_64:
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.quad 0, .LwaitS1 # PSW to handle ext int, 64 bit
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.LwaitpswS1:
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.long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
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.LtimeS1:
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.quad 0 # current time
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.LctlS1:
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.long 0 # CT0 contents
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#
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# Subroutine to synchronously issue a service call.
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#
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# Parameters:
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# R2 = command word
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# R3 = sccb address
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#
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# Returns:
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# R2 = 0 on success, 1 on failure
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# R3 = sccb response code if R2 = 0
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#
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_sclp_servc:
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stm %r6,%r15,24(%r15) # save registers
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ahi %r15,-96 # create stack frame
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lr %r6,%r2 # save command word
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lr %r7,%r3 # save sccb address
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.LretryS2:
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lhi %r2,1 # error return code
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.insn rre,0xb2200000,%r6,%r7 # servc
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brc 1,.LendS2 # exit if not operational
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brc 8,.LnotbusyS2 # go on if not busy
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sr %r2,%r2 # wait until no longer busy
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bras %r14,_sclp_wait_int
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j .LretryS2 # retry
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.LnotbusyS2:
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sr %r2,%r2 # wait until result
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bras %r14,_sclp_wait_int
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sr %r2,%r2
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lh %r3,6(%r7)
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.LendS2:
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lm %r6,%r15,120(%r15) # restore registers
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br %r14
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#
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# Subroutine to set up the SCLP interface.
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#
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# Parameters:
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# R2 = 0 to activate, non-zero to deactivate
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#
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# Returns:
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# R2 = 0 on success, non-zero on failure
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#
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_sclp_setup:
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stm %r6,%r15,24(%r15) # save registers
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ahi %r15,-96 # create stack frame
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basr %r13,0 # get base register
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.LbaseS3:
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l %r6,.LsccbS0-.LbaseS3(%r13) # prepare init mask sccb
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mvc 0(.LinitendS3-.LinitsccbS3,%r6),.LinitsccbS3-.LbaseS3(%r13)
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ltr %r2,%r2 # initialization?
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jz .LdoinitS3 # go ahead
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# clear masks
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xc .LinitmaskS3-.LinitsccbS3(8,%r6),.LinitmaskS3-.LinitsccbS3(%r6)
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.LdoinitS3:
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l %r2,.LwritemaskS3-.LbaseS3(%r13)# get command word
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lr %r3,%r6 # get sccb address
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bras %r14,_sclp_servc # issue service call
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ltr %r2,%r2 # servc successful?
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jnz .LerrorS3
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chi %r3,0x20 # write mask successful?
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jne .LerrorS3
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# check masks
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la %r2,.LinitmaskS3-.LinitsccbS3(%r6)
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l %r1,0(%r2) # receive mask ok?
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n %r1,12(%r2)
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cl %r1,0(%r2)
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jne .LerrorS3
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l %r1,4(%r2) # send mask ok?
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n %r1,8(%r2)
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cl %r1,4(%r2)
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sr %r2,%r2
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je .LendS3
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.LerrorS3:
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lhi %r2,1 # error return code
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.LendS3:
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lm %r6,%r15,120(%r15) # restore registers
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br %r14
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.LwritemaskS3:
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.long 0x00780005 # SCLP command for write mask
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.LinitsccbS3:
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.word .LinitendS3-.LinitsccbS3
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.byte 0,0,0,0
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.word 0
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.word 0
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.word 4
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.LinitmaskS3:
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.long 0x80000000
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.long 0x40000000
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.long 0
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.long 0
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.LinitendS3:
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#
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# Subroutine which prints a given text to the SCLP console.
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#
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# Parameters:
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# R2 = address of nil-terminated ASCII text
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#
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# Returns:
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# R2 = 0 on success, 1 on failure
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#
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_sclp_print:
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stm %r6,%r15,24(%r15) # save registers
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ahi %r15,-96 # create stack frame
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basr %r13,0 # get base register
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.LbaseS4:
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l %r8,.LsccbS0-.LbaseS4(%r13) # prepare write data sccb
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mvc 0(.LmtoS4-.LwritesccbS4,%r8),.LwritesccbS4-.LbaseS4(%r13)
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la %r7,.LmtoS4-.LwritesccbS4(%r8) # current mto addr
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sr %r0,%r0
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l %r10,.Lascebc-.LbaseS4(%r13) # address of translation table
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.LinitmtoS4:
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# initialize mto
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mvc 0(.LmtoendS4-.LmtoS4,%r7),.LmtoS4-.LbaseS4(%r13)
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lhi %r6,.LmtoendS4-.LmtoS4 # current mto length
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.LloopS4:
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ic %r0,0(%r2) # get character
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ahi %r2,1
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ltr %r0,%r0 # end of string?
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jz .LfinalizemtoS4
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chi %r0,0x0a # end of line (NL)?
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jz .LfinalizemtoS4
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stc %r0,0(%r6,%r7) # copy to mto
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la %r11,0(%r6,%r7)
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tr 0(1,%r11),0(%r10) # translate to EBCDIC
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ahi %r6,1
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j .LloopS4
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.LfinalizemtoS4:
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sth %r6,0(%r7) # update mto length
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lh %r9,.LmdbS4-.LwritesccbS4(%r8) # update mdb length
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ar %r9,%r6
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sth %r9,.LmdbS4-.LwritesccbS4(%r8)
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lh %r9,.LevbufS4-.LwritesccbS4(%r8)# update evbuf length
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ar %r9,%r6
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sth %r9,.LevbufS4-.LwritesccbS4(%r8)
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lh %r9,0(%r8) # update sccb length
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ar %r9,%r6
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sth %r9,0(%r8)
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ar %r7,%r6 # update current mto address
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ltr %r0,%r0 # more characters?
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jnz .LinitmtoS4
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l %r2,.LwritedataS4-.LbaseS4(%r13)# write data
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lr %r3,%r8
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bras %r14,_sclp_servc
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ltr %r2,%r2 # servc successful?
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jnz .LendS4
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chi %r3,0x20 # write data successful?
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je .LendS4
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lhi %r2,1 # error return code
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.LendS4:
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lm %r6,%r15,120(%r15) # restore registers
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br %r14
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#
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# Function which prints a given text to the SCLP console.
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#
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# Parameters:
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# R2 = address of nil-terminated ASCII text
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#
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# Returns:
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# R2 = 0 on success, 1 on failure
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#
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ENTRY(_sclp_print_early)
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stm %r6,%r15,24(%r15) # save registers
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ahi %r15,-96 # create stack frame
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tm LC_AR_MODE_ID,1
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jno .Lesa2
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ahi %r15,-80
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stmh %r6,%r15,96(%r15) # store upper register halves
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basr %r13,0
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lmh %r0,%r15,.Lzeroes-.(%r13) # clear upper register halves
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.Lesa2:
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lr %r10,%r2 # save string pointer
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lhi %r2,0
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bras %r14,_sclp_setup # enable console
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ltr %r2,%r2
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jnz .LendS5
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lr %r2,%r10
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bras %r14,_sclp_print # print string
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ltr %r2,%r2
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jnz .LendS5
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lhi %r2,1
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bras %r14,_sclp_setup # disable console
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.LendS5:
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tm LC_AR_MODE_ID,1
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jno .Lesa3
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lgfr %r2,%r2 # sign extend return value
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lmh %r6,%r15,96(%r15) # restore upper register halves
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ahi %r15,80
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.Lesa3:
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lm %r6,%r15,120(%r15) # restore registers
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br %r14
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.Lzeroes:
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.fill 64,4,0
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.LwritedataS4:
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.long 0x00760005 # SCLP command for write data
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.LwritesccbS4:
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# sccb
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.word .LmtoS4-.LwritesccbS4
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.byte 0
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.byte 0,0,0
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.word 0
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# evbuf
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.LevbufS4:
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.word .LmtoS4-.LevbufS4
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.byte 0x02
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.byte 0
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.word 0
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.LmdbS4:
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# mdb
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.word .LmtoS4-.LmdbS4
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.word 1
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.long 0xd4c4c240
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.long 1
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# go
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.LgoS4:
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.word .LmtoS4-.LgoS4
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.word 1
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.long 0
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.byte 0,0,0,0,0,0,0,0
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.byte 0,0,0
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.byte 0
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.byte 0,0,0,0,0,0,0
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.byte 0
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.word 0
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.byte 0,0,0,0,0,0,0,0,0,0
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.byte 0,0,0,0,0,0,0,0
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.byte 0,0,0,0,0,0,0,0
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.LmtoS4:
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.word .LmtoendS4-.LmtoS4
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.word 4
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.word 0x1000
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.byte 0
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.byte 0,0,0
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.LmtoendS4:
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# Global constants
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.LsccbS0:
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.long _sclp_work_area
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.Lascebc:
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.long _ascebc
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.section .data,"aw",@progbits
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.balign 4096
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_sclp_work_area:
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.fill 4096
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.previous
|
||||
|
|
@ -0,0 +1,160 @@
|
|||
/*
|
||||
* Copyright IBM Corp. 2015
|
||||
* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <asm/ebcdic.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/lowcore.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/sclp.h>
|
||||
|
||||
static char _sclp_work_area[4096] __aligned(PAGE_SIZE);
|
||||
|
||||
static void _sclp_wait_int(void)
|
||||
{
|
||||
unsigned long cr0, cr0_new, psw_mask, addr;
|
||||
psw_t psw_ext_save, psw_wait;
|
||||
|
||||
__ctl_store(cr0, 0, 0);
|
||||
cr0_new = cr0 | 0x200;
|
||||
__ctl_load(cr0_new, 0, 0);
|
||||
|
||||
psw_ext_save = S390_lowcore.external_new_psw;
|
||||
psw_mask = __extract_psw() & (PSW_MASK_EA | PSW_MASK_BA);
|
||||
S390_lowcore.external_new_psw.mask = psw_mask;
|
||||
psw_wait.mask = psw_mask | PSW_MASK_EXT | PSW_MASK_WAIT;
|
||||
S390_lowcore.ext_int_code = 0;
|
||||
|
||||
do {
|
||||
asm volatile(
|
||||
" larl %[addr],0f\n"
|
||||
" stg %[addr],%[psw_wait_addr]\n"
|
||||
" stg %[addr],%[psw_ext_addr]\n"
|
||||
" lpswe %[psw_wait]\n"
|
||||
"0:\n"
|
||||
: [addr] "=&d" (addr),
|
||||
[psw_wait_addr] "=Q" (psw_wait.addr),
|
||||
[psw_ext_addr] "=Q" (S390_lowcore.external_new_psw.addr)
|
||||
: [psw_wait] "Q" (psw_wait)
|
||||
: "cc", "memory");
|
||||
} while (S390_lowcore.ext_int_code != EXT_IRQ_SERVICE_SIG);
|
||||
|
||||
__ctl_load(cr0, 0, 0);
|
||||
S390_lowcore.external_new_psw = psw_ext_save;
|
||||
}
|
||||
|
||||
static int _sclp_servc(unsigned int cmd, char *sccb)
|
||||
{
|
||||
unsigned int cc;
|
||||
|
||||
do {
|
||||
asm volatile(
|
||||
" .insn rre,0xb2200000,%1,%2\n"
|
||||
" ipm %0\n"
|
||||
: "=d" (cc) : "d" (cmd), "a" (sccb)
|
||||
: "cc", "memory");
|
||||
cc >>= 28;
|
||||
if (cc == 3)
|
||||
return -EINVAL;
|
||||
_sclp_wait_int();
|
||||
} while (cc != 0);
|
||||
return (*(unsigned short *)(sccb + 6) == 0x20) ? 0 : -EIO;
|
||||
}
|
||||
|
||||
static int _sclp_setup(int disable)
|
||||
{
|
||||
static unsigned char init_sccb[] = {
|
||||
0x00, 0x1c,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x04,
|
||||
0x80, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
unsigned int *masks;
|
||||
int rc;
|
||||
|
||||
memcpy(_sclp_work_area, init_sccb, 28);
|
||||
masks = (unsigned int *)(_sclp_work_area + 12);
|
||||
if (disable)
|
||||
memset(masks, 0, 16);
|
||||
/* SCLP write mask */
|
||||
rc = _sclp_servc(0x00780005, _sclp_work_area);
|
||||
if (rc)
|
||||
return rc;
|
||||
if ((masks[0] & masks[3]) != masks[0] ||
|
||||
(masks[1] & masks[2]) != masks[1])
|
||||
return -EIO;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int _sclp_print(const char *str)
|
||||
{
|
||||
static unsigned char write_head[] = {
|
||||
/* sccb header */
|
||||
0x00, 0x52, /* 0 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 2 */
|
||||
/* evbuf */
|
||||
0x00, 0x4a, /* 8 */
|
||||
0x02, 0x00, 0x00, 0x00, /* 10 */
|
||||
/* mdb */
|
||||
0x00, 0x44, /* 14 */
|
||||
0x00, 0x01, /* 16 */
|
||||
0xd4, 0xc4, 0xc2, 0x40, /* 18 */
|
||||
0x00, 0x00, 0x00, 0x01, /* 22 */
|
||||
/* go */
|
||||
0x00, 0x38, /* 26 */
|
||||
0x00, 0x01, /* 28 */
|
||||
0x00, 0x00, 0x00, 0x00, /* 30 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 34 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 42 */
|
||||
0x00, 0x00, 0x00, 0x00, /* 50 */
|
||||
0x00, 0x00, /* 54 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 56 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 64 */
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 72 */
|
||||
0x00, 0x00, /* 80 */
|
||||
};
|
||||
static unsigned char write_mto[] = {
|
||||
/* mto */
|
||||
0x00, 0x0a, /* 0 */
|
||||
0x00, 0x04, /* 2 */
|
||||
0x10, 0x00, /* 4 */
|
||||
0x00, 0x00, 0x00, 0x00 /* 6 */
|
||||
};
|
||||
unsigned char *ptr, ch;
|
||||
unsigned int count;
|
||||
|
||||
memcpy(_sclp_work_area, write_head, sizeof(write_head));
|
||||
ptr = _sclp_work_area + sizeof(write_head);
|
||||
do {
|
||||
memcpy(ptr, write_mto, sizeof(write_mto));
|
||||
for (count = sizeof(write_mto); (ch = *str++) != 0; count++) {
|
||||
if (ch == 0x0a)
|
||||
break;
|
||||
ptr[count] = _ascebc[ch];
|
||||
}
|
||||
/* Update length fields in mto, mdb, evbuf and sccb */
|
||||
*(unsigned short *) ptr = count;
|
||||
*(unsigned short *)(_sclp_work_area + 14) += count;
|
||||
*(unsigned short *)(_sclp_work_area + 8) += count;
|
||||
*(unsigned short *)(_sclp_work_area + 0) += count;
|
||||
ptr += count;
|
||||
} while (ch != 0);
|
||||
|
||||
/* SCLP write data */
|
||||
return _sclp_servc(0x00760005, _sclp_work_area);
|
||||
}
|
||||
|
||||
int _sclp_print_early(const char *str)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = _sclp_setup(0);
|
||||
if (rc)
|
||||
return rc;
|
||||
rc = _sclp_print(str);
|
||||
if (rc)
|
||||
return rc;
|
||||
return _sclp_setup(1);
|
||||
}
|
||||
Loading…
Reference in New Issue