MIPS: OCTEON: Remove some code limiting NR_IRQS to 255
Follow-on patches for OCTEON III will increase the number of irqs to potentially more than 256. Increase the width of the octeon_irq_ciu_to_irq to int to be able to handle this case. Remove the hacky code that verified that u8 would not be overflowed. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12495/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2004-2014 Cavium, Inc.
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* Copyright (C) 2004-2016 Cavium, Inc.
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*/
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#include <linux/of_address.h>
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@ -28,7 +28,7 @@ struct octeon_irq_ciu_domain_data {
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int num_sum; /* number of sum registers (2 or 3). */
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};
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static __read_mostly u8 octeon_irq_ciu_to_irq[8][64];
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static __read_mostly int octeon_irq_ciu_to_irq[8][64];
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struct octeon_ciu_chip_data {
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union {
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@ -1158,16 +1158,6 @@ static struct irq_chip *octeon_irq_ciu_chip;
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static struct irq_chip *octeon_irq_ciu_chip_edge;
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static struct irq_chip *octeon_irq_gpio_chip;
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static bool octeon_irq_virq_in_range(unsigned int virq)
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{
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/* We cannot let it overflow the mapping array. */
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if (virq < (1ul << 8 * sizeof(octeon_irq_ciu_to_irq[0][0])))
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return true;
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WARN_ONCE(true, "virq out of range %u.\n", virq);
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return false;
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}
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static int octeon_irq_ciu_map(struct irq_domain *d,
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unsigned int virq, irq_hw_number_t hw)
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{
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@ -1176,13 +1166,6 @@ static int octeon_irq_ciu_map(struct irq_domain *d,
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unsigned int bit = hw & 63;
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struct octeon_irq_ciu_domain_data *dd = d->host_data;
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if (!octeon_irq_virq_in_range(virq))
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return -EINVAL;
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/* Don't map irq if it is reserved for GPIO. */
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if (line == 0 && bit >= 16 && bit <32)
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return 0;
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if (line >= dd->num_sum || octeon_irq_ciu_to_irq[line][bit] != 0)
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return -EINVAL;
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@ -1215,9 +1198,6 @@ static int octeon_irq_gpio_map(struct irq_domain *d,
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unsigned int line, bit;
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int r;
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if (!octeon_irq_virq_in_range(virq))
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return -EINVAL;
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line = (hw + gpiod->base_hwirq) >> 6;
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bit = (hw + gpiod->base_hwirq) & 63;
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if (line > ARRAY_SIZE(octeon_irq_ciu_to_irq) ||
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@ -1899,9 +1879,6 @@ static int octeon_irq_ciu2_map(struct irq_domain *d,
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unsigned int line = hw >> 6;
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unsigned int bit = hw & 63;
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if (!octeon_irq_virq_in_range(virq))
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return -EINVAL;
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/*
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* Don't map irq if it is reserved for GPIO.
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* (Line 7 are the GPIO lines.)
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