mtd: nand: denali: propagate page to helpers via function argument
This driver stores the currently addressed page into denali->page, which is later read out by helper functions. While I am tackling on this driver, I often missed to insert "denali->page = page;" where needed. This makes page_read/write callbacks to get access to a wrong page, which is a bug hard to figure out. Instead, I'd rather pass the page via function argument because the compiler's prototype checks will help to detect bugs. For the same reason, propagate dma_addr to the DMA helpers instead of denali->buf.dma_buf . Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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@ -337,7 +337,7 @@ static int denali_dev_ready(struct mtd_info *mtd)
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* sends a pipeline command operation to the controller. See the Denali NAND
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* controller's user guide for more information (section 4.2.3.6).
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*/
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static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
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static int denali_send_pipeline_cmd(struct denali_nand_info *denali, int page,
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bool ecc_en, bool transfer_spare,
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int access_type, int op)
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{
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@ -348,7 +348,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
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denali_reset_irq(denali);
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addr = BANK(denali->flash_bank) | denali->page;
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addr = BANK(denali->flash_bank) | page;
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if (op == DENALI_WRITE && access_type != SPARE_ACCESS) {
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cmd = MODE_01 | addr;
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@ -421,9 +421,7 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
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uint32_t irq_mask = INTR__PROGRAM_COMP | INTR__PROGRAM_FAIL;
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int status = 0;
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denali->page = page;
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if (denali_send_pipeline_cmd(denali, false, false, SPARE_ACCESS,
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if (denali_send_pipeline_cmd(denali, page, false, false, SPARE_ACCESS,
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DENALI_WRITE) == PASS) {
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write_data_to_flash_mem(denali, buf, mtd->oobsize);
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@ -448,9 +446,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
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uint32_t irq_mask = INTR__LOAD_COMP;
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uint32_t irq_status, addr, cmd;
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denali->page = page;
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if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS,
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if (denali_send_pipeline_cmd(denali, page, false, true, SPARE_ACCESS,
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DENALI_READ) == PASS) {
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read_data_from_flash_mem(denali, buf, mtd->oobsize);
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@ -462,8 +458,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
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irq_status = denali_wait_for_irq(denali, irq_mask);
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if (!(irq_status & INTR__LOAD_COMP))
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dev_err(denali->dev, "page on OOB timeout %d\n",
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denali->page);
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dev_err(denali->dev, "page on OOB timeout %d\n", page);
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/*
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* We set the device back to MAIN_ACCESS here as I observed
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@ -472,7 +467,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
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* is reliable (according to the MTD test infrastructure)
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* if you are in MAIN_ACCESS.
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*/
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addr = BANK(denali->flash_bank) | denali->page;
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addr = BANK(denali->flash_bank) | page;
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cmd = MODE_10 | addr;
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index_addr(denali, cmd, MAIN_ACCESS);
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}
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@ -637,13 +632,13 @@ static void denali_enable_dma(struct denali_nand_info *denali, bool en)
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ioread32(denali->flash_reg + DMA_ENABLE);
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}
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static void denali_setup_dma64(struct denali_nand_info *denali, int op)
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static void denali_setup_dma64(struct denali_nand_info *denali,
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dma_addr_t dma_addr, int page, int op)
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{
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uint32_t mode;
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const int page_count = 1;
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uint64_t addr = denali->buf.dma_buf;
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mode = MODE_10 | BANK(denali->flash_bank) | denali->page;
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mode = MODE_10 | BANK(denali->flash_bank) | page;
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/* DMA is a three step process */
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@ -654,41 +649,42 @@ static void denali_setup_dma64(struct denali_nand_info *denali, int op)
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index_addr(denali, mode, 0x01002000 | (64 << 16) | op | page_count);
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/* 2. set memory low address */
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index_addr(denali, mode, addr);
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index_addr(denali, mode, dma_addr);
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/* 3. set memory high address */
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index_addr(denali, mode, addr >> 32);
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index_addr(denali, mode, (uint64_t)dma_addr >> 32);
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}
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static void denali_setup_dma32(struct denali_nand_info *denali, int op)
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static void denali_setup_dma32(struct denali_nand_info *denali,
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dma_addr_t dma_addr, int page, int op)
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{
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uint32_t mode;
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const int page_count = 1;
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uint32_t addr = denali->buf.dma_buf;
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mode = MODE_10 | BANK(denali->flash_bank);
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/* DMA is a four step process */
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/* 1. setup transfer type and # of pages */
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index_addr(denali, mode | denali->page, 0x2000 | op | page_count);
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index_addr(denali, mode | page, 0x2000 | op | page_count);
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/* 2. set memory high address bits 23:8 */
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index_addr(denali, mode | ((addr >> 16) << 8), 0x2200);
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index_addr(denali, mode | ((dma_addr >> 16) << 8), 0x2200);
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/* 3. set memory low address bits 23:8 */
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index_addr(denali, mode | ((addr & 0xffff) << 8), 0x2300);
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index_addr(denali, mode | ((dma_addr & 0xffff) << 8), 0x2300);
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/* 4. interrupt when complete, burst len = 64 bytes */
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index_addr(denali, mode | 0x14000, 0x2400);
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}
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static void denali_setup_dma(struct denali_nand_info *denali, int op)
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static void denali_setup_dma(struct denali_nand_info *denali,
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dma_addr_t dma_addr, int page, int op)
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{
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if (denali->caps & DENALI_CAP_DMA_64BIT)
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denali_setup_dma64(denali, op);
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denali_setup_dma64(denali, dma_addr, page, op);
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else
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denali_setup_dma32(denali, op);
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denali_setup_dma32(denali, dma_addr, page, op);
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}
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/*
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@ -705,8 +701,6 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
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uint32_t irq_mask = INTR__DMA_CMD_COMP | INTR__PROGRAM_FAIL;
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int ret = 0;
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denali->page = page;
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/*
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* if it is a raw xfer, we want to disable ecc and send the spare area.
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* !raw_xfer - enable ecc
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@ -729,7 +723,7 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip,
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denali_reset_irq(denali);
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denali_enable_dma(denali, true);
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denali_setup_dma(denali, DENALI_WRITE);
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denali_setup_dma(denali, addr, page, DENALI_WRITE);
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/* wait for operation to complete */
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irq_status = denali_wait_for_irq(denali, irq_mask);
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@ -805,15 +799,13 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
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unsigned long uncor_ecc_flags = 0;
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int stat = 0;
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denali->page = page;
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setup_ecc_for_xfer(denali, true, false);
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denali_enable_dma(denali, true);
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dma_sync_single_for_device(denali->dev, addr, size, DMA_FROM_DEVICE);
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denali_reset_irq(denali);
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denali_setup_dma(denali, DENALI_READ);
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denali_setup_dma(denali, addr, page, DENALI_READ);
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/* wait for operation to complete */
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irq_status = denali_wait_for_irq(denali, irq_mask);
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@ -832,7 +824,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
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return stat;
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if (uncor_ecc_flags) {
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read_oob_data(mtd, chip->oob_poi, denali->page);
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read_oob_data(mtd, chip->oob_poi, page);
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stat = denali_check_erased_page(mtd, chip, buf,
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uncor_ecc_flags, stat);
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@ -850,15 +842,13 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
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uint32_t irq_mask = INTR__DMA_CMD_COMP;
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uint32_t irq_status;
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denali->page = page;
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setup_ecc_for_xfer(denali, false, true);
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denali_enable_dma(denali, true);
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dma_sync_single_for_device(denali->dev, addr, size, DMA_FROM_DEVICE);
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denali_reset_irq(denali);
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denali_setup_dma(denali, DENALI_READ);
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denali_setup_dma(denali, addr, page, DENALI_READ);
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/* wait for operation to complete */
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irq_status = denali_wait_for_irq(denali, irq_mask);
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@ -316,7 +316,6 @@ struct denali_nand_info {
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int flash_bank; /* currently selected chip */
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struct nand_buf buf;
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struct device *dev;
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int page;
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void __iomem *flash_reg; /* Register Interface */
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void __iomem *flash_mem; /* Host Data/Command Interface */
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