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arm64: arch_timer: Add device tree binding for A-008585 erratum

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This erratum describes a bug in logic outside the core, so MIDR can't be
used to identify its presence, and reading an SoC-specific revision
register from common arch timer code would be awkward.  So, describe it
in the device tree.

Signed-off-by: Scott Wood <oss@buserror.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Scott Wood 2016-09-22 03:35:15 -05:00 committed by Will Deacon
parent ca219452c6
commit 22e4339045
1 changed files with 6 additions and 0 deletions
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6
Documentation/devicetree/bindings/arm/arch_timer.txt
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@ -25,6 +25,12 @@ to deliver its interrupts via SPIs.
- always-on : a boolean property. If present, the timer is powered through an
always-on power domain, therefore it never loses context.
- fsl,erratum-a008585 : A boolean property. Indicates the presence of
QorIQ erratum A-008585, which says that reading the counter is
unreliable unless the same value is returned by back-to-back reads.
This also affects writes to the tval register, due to the implicit
counter read.
** Optional properties:
- arm,cpu-registers-not-fw-configured : Firmware does not initialize