arm64: arch_timer: Add device tree binding for A-008585 erratum
This erratum describes a bug in logic outside the core, so MIDR can't be used to identify its presence, and reading an SoC-specific revision register from common arch timer code would be awkward. So, describe it in the device tree. Signed-off-by: Scott Wood <oss@buserror.net> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -25,6 +25,12 @@ to deliver its interrupts via SPIs.
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- always-on : a boolean property. If present, the timer is powered through an
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always-on power domain, therefore it never loses context.
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- fsl,erratum-a008585 : A boolean property. Indicates the presence of
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QorIQ erratum A-008585, which says that reading the counter is
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unreliable unless the same value is returned by back-to-back reads.
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This also affects writes to the tval register, due to the implicit
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counter read.
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** Optional properties:
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- arm,cpu-registers-not-fw-configured : Firmware does not initialize
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