ASoC: Don't use write sequencer to power up WM8903
The write sequencer sequencer sequence takes longer than is desirable as it brings up a full playback path which is not required at this point. Open coding the sequence cuts the startup time by two thirds. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
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@ -297,15 +297,6 @@ static int wm8903_run_sequence(struct snd_soc_codec *codec, unsigned int start)
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return 0;
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}
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static void wm8903_sync_reg_cache(struct snd_soc_codec *codec, u16 *cache)
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{
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int i;
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/* There really ought to be something better we can do here :/ */
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for (i = 0; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
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cache[i] = codec->hw_read(codec, i);
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}
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static void wm8903_reset(struct snd_soc_codec *codec)
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{
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snd_soc_write(codec, WM8903_SW_RESET_AND_ID, 0);
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@ -1142,6 +1133,7 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec,
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switch (level) {
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case SND_SOC_BIAS_ON:
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break;
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case SND_SOC_BIAS_PREPARE:
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snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
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WM8903_VMID_RES_MASK,
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@ -1150,16 +1142,59 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec,
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case SND_SOC_BIAS_STANDBY:
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if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
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snd_soc_write(codec, WM8903_CLOCK_RATES_2,
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WM8903_CLK_SYS_ENA);
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snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
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WM8903_POBCTRL | WM8903_ISEL_MASK |
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WM8903_STARTUP_BIAS_ENA |
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WM8903_BIAS_ENA,
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WM8903_POBCTRL |
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(2 << WM8903_ISEL_SHIFT) |
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WM8903_STARTUP_BIAS_ENA);
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/* Change DC servo dither level in startup sequence */
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snd_soc_write(codec, WM8903_WRITE_SEQUENCER_0, 0x11);
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snd_soc_write(codec, WM8903_WRITE_SEQUENCER_1, 0x1257);
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snd_soc_write(codec, WM8903_WRITE_SEQUENCER_2, 0x2);
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snd_soc_update_bits(codec,
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WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0,
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WM8903_SPK_DISCHARGE,
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WM8903_SPK_DISCHARGE);
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wm8903_run_sequence(codec, 0);
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wm8903_sync_reg_cache(codec, codec->reg_cache);
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msleep(33);
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snd_soc_update_bits(codec, WM8903_POWER_MANAGEMENT_5,
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WM8903_SPKL_ENA | WM8903_SPKR_ENA,
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WM8903_SPKL_ENA | WM8903_SPKR_ENA);
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snd_soc_update_bits(codec,
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WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0,
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WM8903_SPK_DISCHARGE, 0);
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snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
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WM8903_VMID_TIE_ENA |
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WM8903_BUFIO_ENA |
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WM8903_VMID_IO_ENA |
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WM8903_VMID_SOFT_MASK |
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WM8903_VMID_RES_MASK |
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WM8903_VMID_BUF_ENA,
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WM8903_VMID_TIE_ENA |
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WM8903_BUFIO_ENA |
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WM8903_VMID_IO_ENA |
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(2 << WM8903_VMID_SOFT_SHIFT) |
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WM8903_VMID_RES_250K |
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WM8903_VMID_BUF_ENA);
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msleep(129);
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snd_soc_update_bits(codec, WM8903_POWER_MANAGEMENT_5,
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WM8903_SPKL_ENA | WM8903_SPKR_ENA,
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0);
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snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
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WM8903_VMID_SOFT_MASK, 0);
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snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
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WM8903_VMID_RES_MASK,
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WM8903_VMID_RES_50K);
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snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
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WM8903_BIAS_ENA | WM8903_POBCTRL,
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WM8903_BIAS_ENA);
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/* By default no bypass paths are enabled so
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* enable Class W support.
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