arm64: tegra: Add sor1_src clock
The sor1 IP block needs the sor1_src clock to configure the clock tree depending on whether it's running in HDMI or DP mode. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -186,10 +186,11 @@
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reg = <0x0 0x54580000 0x0 0x00040000>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_SOR1>,
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<&tegra_car TEGRA210_CLK_SOR1_SRC>,
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<&tegra_car TEGRA210_CLK_PLL_D2_OUT0>,
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<&tegra_car TEGRA210_CLK_PLL_DP>,
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<&tegra_car TEGRA210_CLK_SOR_SAFE>;
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clock-names = "sor", "parent", "dp", "safe";
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clock-names = "sor", "source", "parent", "dp", "safe";
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resets = <&tegra_car 183>;
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reset-names = "sor";
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pinctrl-0 = <&state_dpaux1_aux>;
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