Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/fb: fix FBIOGET/PUT_VSCREENINFO pixel clock handling drm: make sure page protections are updated after changing vm_flags drm/radeon/kms: Report vga connector is connected according to ddc_probe drm: mm always protect change to unused_nodes with unused_lock spinlock drm/radeon/kms: Disable TV load detect on RS400,RC410,RS480 drm/radeon/kms: read back register before writing in IIO. drm/radeon/kms: fix handling of d1/d2 vga drm: work around EDIDs with bad htotal/vtotal values drm/radeon/kms: resume AGP by calling init.
This commit is contained in:
commit
23e041dbaa
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@ -662,6 +662,12 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
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return NULL;
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}
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/* Some EDIDs have bogus h/vtotal values */
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if (mode->hsync_end > mode->htotal)
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mode->htotal = mode->hsync_end + 1;
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if (mode->vsync_end > mode->vtotal)
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mode->vtotal = mode->vsync_end + 1;
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drm_mode_set_name(mode);
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if (pt->misc & DRM_EDID_PT_INTERLACED)
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@ -599,7 +599,7 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
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struct drm_framebuffer *fb = fb_helper->fb;
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int depth;
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if (var->pixclock == -1 || !var->pixclock)
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if (var->pixclock != 0)
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return -EINVAL;
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/* Need to resize the fb object !!! */
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@ -691,7 +691,7 @@ int drm_fb_helper_set_par(struct fb_info *info)
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int ret;
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int i;
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if (var->pixclock != -1) {
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if (var->pixclock != 0) {
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DRM_ERROR("PIXEL CLCOK SET\n");
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return -EINVAL;
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}
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@ -904,7 +904,7 @@ int drm_fb_helper_single_fb_probe(struct drm_device *dev,
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fb_helper->fb = fb;
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if (new_fb) {
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info->var.pixclock = -1;
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info->var.pixclock = 0;
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if (register_framebuffer(info) < 0)
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return -EINVAL;
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} else {
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@ -552,7 +552,7 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
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vma->vm_flags |= VM_RESERVED | VM_IO | VM_PFNMAP | VM_DONTEXPAND;
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vma->vm_ops = obj->dev->driver->gem_vm_ops;
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vma->vm_private_data = map->handle;
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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vma->vm_page_prot = pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
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/* Take a ref for this mapping of the object, so that the fault
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* handler can dereference the mmap offset's pointer to the object.
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@ -103,6 +103,11 @@ static struct drm_mm_node *drm_mm_kmalloc(struct drm_mm *mm, int atomic)
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return child;
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}
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/* drm_mm_pre_get() - pre allocate drm_mm_node structure
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* drm_mm: memory manager struct we are pre-allocating for
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*
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* Returns 0 on success or -ENOMEM if allocation fails.
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*/
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int drm_mm_pre_get(struct drm_mm *mm)
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{
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struct drm_mm_node *node;
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@ -253,12 +258,14 @@ void drm_mm_put_block(struct drm_mm_node *cur)
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prev_node->size += next_node->size;
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list_del(&next_node->ml_entry);
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list_del(&next_node->fl_entry);
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spin_lock(&mm->unused_lock);
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if (mm->num_unused < MM_UNUSED_TARGET) {
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list_add(&next_node->fl_entry,
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&mm->unused_nodes);
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++mm->num_unused;
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} else
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kfree(next_node);
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spin_unlock(&mm->unused_lock);
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} else {
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next_node->size += cur->size;
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next_node->start = cur->start;
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@ -271,11 +278,13 @@ void drm_mm_put_block(struct drm_mm_node *cur)
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list_add(&cur->fl_entry, &mm->fl_entry);
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} else {
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list_del(&cur->ml_entry);
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spin_lock(&mm->unused_lock);
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if (mm->num_unused < MM_UNUSED_TARGET) {
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list_add(&cur->fl_entry, &mm->unused_nodes);
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++mm->num_unused;
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} else
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kfree(cur);
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spin_unlock(&mm->unused_lock);
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}
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}
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@ -107,6 +107,7 @@ static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
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base += 3;
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break;
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case ATOM_IIO_WRITE:
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(void)ctx->card->reg_read(ctx->card, CU16(base + 1));
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ctx->card->reg_write(ctx->card, CU16(base + 1), temp);
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base += 3;
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break;
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@ -519,6 +519,7 @@ typedef int (*radeon_packet3_check_t)(struct radeon_cs_parser *p,
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* AGP
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*/
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int radeon_agp_init(struct radeon_device *rdev);
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void radeon_agp_resume(struct radeon_device *rdev);
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void radeon_agp_fini(struct radeon_device *rdev);
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@ -237,6 +237,18 @@ int radeon_agp_init(struct radeon_device *rdev)
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#endif
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}
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void radeon_agp_resume(struct radeon_device *rdev)
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{
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#if __OS_HAS_AGP
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int r;
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if (rdev->flags & RADEON_IS_AGP) {
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r = radeon_agp_init(rdev);
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if (r)
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dev_warn(rdev->dev, "radeon AGP reinit failed\n");
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}
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#endif
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}
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void radeon_agp_fini(struct radeon_device *rdev)
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{
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#if __OS_HAS_AGP
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@ -566,8 +566,9 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect
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radeon_i2c_do_lock(radeon_connector, 0);
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if (!radeon_connector->edid) {
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DRM_ERROR("DDC responded but not EDID found for %s\n",
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drm_get_connector_name(connector));
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DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
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drm_get_connector_name(connector));
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ret = connector_status_connected;
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} else {
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radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
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@ -720,8 +721,8 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
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radeon_i2c_do_lock(radeon_connector, 0);
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if (!radeon_connector->edid) {
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DRM_ERROR("DDC responded but not EDID found for %s\n",
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drm_get_connector_name(connector));
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DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
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drm_get_connector_name(connector));
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} else {
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radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
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@ -1149,6 +1150,13 @@ radeon_add_legacy_connector(struct drm_device *dev,
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if (ret)
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goto failed;
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radeon_connector->dac_load_detect = true;
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/* RS400,RC410,RS480 chipset seems to report a lot
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* of false positive on load detect, we haven't yet
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* found a way to make load detect reliable on those
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* chipset, thus just disable it for TV.
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*/
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if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
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radeon_connector->dac_load_detect = false;
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drm_connector_attach_property(&radeon_connector->base,
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rdev->mode_info.load_detect_property,
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1);
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@ -688,6 +688,8 @@ int radeon_resume_kms(struct drm_device *dev)
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return -1;
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}
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pci_set_master(dev->pdev);
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/* resume AGP if in use */
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radeon_agp_resume(rdev);
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radeon_resume(rdev);
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radeon_restore_bios_scratch_regs(rdev);
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fb_set_suspend(rdev->fbdev_info, 0);
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@ -137,8 +137,6 @@ int rv515_mc_wait_for_idle(struct radeon_device *rdev)
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void rv515_vga_render_disable(struct radeon_device *rdev)
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{
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WREG32(R_000330_D1VGA_CONTROL, 0);
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WREG32(R_000338_D2VGA_CONTROL, 0);
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WREG32(R_000300_VGA_RENDER_CONTROL,
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RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL);
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}
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@ -382,7 +380,6 @@ void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save)
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save->d2crtc_control = RREG32(R_006880_D2CRTC_CONTROL);
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/* Stop all video */
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WREG32(R_000330_D1VGA_CONTROL, 0);
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WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
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WREG32(R_000300_VGA_RENDER_CONTROL, 0);
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WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 1);
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WREG32(R_006880_D2CRTC_CONTROL, 0);
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WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 0);
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WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
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WREG32(R_000330_D1VGA_CONTROL, 0);
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WREG32(R_000338_D2VGA_CONTROL, 0);
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}
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void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save)
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WREG32(R_000328_VGA_HDP_CONTROL, save->vga_hdp_control);
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mdelay(1);
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/* Restore video state */
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WREG32(R_000330_D1VGA_CONTROL, save->d1vga_control);
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WREG32(R_000338_D2VGA_CONTROL, save->d2vga_control);
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WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 1);
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WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 1);
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WREG32(R_006080_D1CRTC_CONTROL, save->d1crtc_control);
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WREG32(R_006880_D2CRTC_CONTROL, save->d2crtc_control);
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WREG32(R_0060E8_D1CRTC_UPDATE_LOCK, 0);
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WREG32(R_0068E8_D2CRTC_UPDATE_LOCK, 0);
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WREG32(R_000330_D1VGA_CONTROL, save->d1vga_control);
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WREG32(R_000338_D2VGA_CONTROL, save->d2vga_control);
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WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control);
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}
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