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clk: imx6sll: configure epdc clock to get desired value 

configure epdc clock to get desired value

Signed-off-by: Robby Cai <robby.cai@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Robby Cai 2019-08-24 18:34:34 -04:00 committed by Dong Aisheng
parent 3ff06a6624
commit 24d9251ca5
1 changed files with 4 additions and 0 deletions
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4
drivers/clk/imx/clk-imx6sll.c
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@ -372,6 +372,10 @@ static void __init imx6sll_clocks_init(struct device_node *ccm_node)
clk_set_parent(hws[IMX6SLL_CLK_PERIPH]->clk, hws[IMX6SLL_CLK_PERIPH_CLK2]->clk);
clk_set_parent(hws[IMX6SLL_CLK_PERIPH_PRE]->clk, hws[IMX6SLL_CLK_PLL2_BUS]->clk);
clk_set_parent(hws[IMX6SLL_CLK_PERIPH]->clk, hws[IMX6SLL_CLK_PERIPH_PRE]->clk);
/* Configure EPDC clocks */
clk_set_rate(hws[IMX6SLL_CLK_PLL3_PFD2]->clk, 320000000);
clk_set_parent(hws[IMX6SLL_CLK_EPDC_PRE_SEL]->clk,
hws[IMX6SLL_CLK_PLL3_PFD2]->clk);
clk_set_rate(hws[IMX6SLL_CLK_AHB]->clk, 132000000);
}