spi: implement SW control for CS times
This change implements CS control for setup, hold & inactive delays. The `cs_setup` delay is completely new, and can help with cases where asserting the CS, also brings the device out of power-sleep, where there needs to be a longer (than usual), before transferring data. The `cs_hold` time can overlap with the `delay` (or `delay_usecs`) from an SPI transfer. The main difference is that `cs_hold` implies that CS will be de-asserted. The `cs_inactive` delay does not have a clear use-case yet. It has been implemented mostly because the `spi_set_cs_timing()` function implements it. To some degree, this could overlap or replace `cs_change_delay`, but this will require more consideration/investigation in the future. All these delays have been added to the `spi_controller` struct, as they would typically be configured by calling `spi_set_cs_timing()` after an `spi_setup()` call. Software-mode for CS control, implies that the `set_cs_timing()` hook has not been provided for the `spi_controller` object. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-16-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -775,6 +775,15 @@ int spi_register_board_info(struct spi_board_info const *info, unsigned n)
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static void spi_set_cs(struct spi_device *spi, bool enable)
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{
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bool enable1 = enable;
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if (!spi->controller->set_cs_timing) {
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if (enable1)
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spi_delay_exec(&spi->controller->cs_setup, NULL);
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else
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spi_delay_exec(&spi->controller->cs_hold, NULL);
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}
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if (spi->mode & SPI_CS_HIGH)
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enable = !enable;
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@ -800,6 +809,11 @@ static void spi_set_cs(struct spi_device *spi, bool enable)
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} else if (spi->controller->set_cs) {
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spi->controller->set_cs(spi, !enable);
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}
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if (!spi->controller->set_cs_timing) {
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if (!enable1)
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spi_delay_exec(&spi->controller->cs_inactive, NULL);
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}
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}
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#ifdef CONFIG_HAS_DMA
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@ -3278,10 +3292,39 @@ EXPORT_SYMBOL_GPL(spi_setup);
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int spi_set_cs_timing(struct spi_device *spi, struct spi_delay *setup,
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struct spi_delay *hold, struct spi_delay *inactive)
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{
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size_t len;
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if (spi->controller->set_cs_timing)
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return spi->controller->set_cs_timing(spi, setup, hold,
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inactive);
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return -ENOTSUPP;
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if ((setup && setup->unit == SPI_DELAY_UNIT_SCK) ||
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(hold && hold->unit == SPI_DELAY_UNIT_SCK) ||
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(inactive && inactive->unit == SPI_DELAY_UNIT_SCK)) {
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dev_err(&spi->dev,
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"Clock-cycle delays for CS not supported in SW mode\n");
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return -ENOTSUPP;
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}
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len = sizeof(struct spi_delay);
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/* copy delays to controller */
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if (setup)
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memcpy(&spi->controller->cs_setup, setup, len);
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else
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memset(&spi->controller->cs_setup, 0, len);
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if (hold)
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memcpy(&spi->controller->cs_hold, hold, len);
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else
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memset(&spi->controller->cs_hold, 0, len);
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if (inactive)
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memcpy(&spi->controller->cs_inactive, inactive, len);
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else
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memset(&spi->controller->cs_inactive, 0, len);
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return 0;
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}
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EXPORT_SYMBOL_GPL(spi_set_cs_timing);
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@ -609,6 +609,11 @@ struct spi_controller {
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/* Optimized handlers for SPI memory-like operations. */
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const struct spi_controller_mem_ops *mem_ops;
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/* CS delays */
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struct spi_delay cs_setup;
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struct spi_delay cs_hold;
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struct spi_delay cs_inactive;
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/* gpio chip select */
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int *cs_gpios;
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struct gpio_desc **cs_gpiods;
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