clk: qcom: gcc: Add support for modem clocks in GCC
Add the required modem clocks in global clock controller which are required to bring the modem out of reset. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/1584596131-22741-3-git-send-email-tdas@codeaurora.org Tested-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
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*/
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#include <linux/clk-provider.h>
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@ -2165,6 +2165,71 @@ static struct clk_branch gcc_video_xo_clk = {
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},
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};
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static struct clk_branch gcc_mss_cfg_ahb_clk = {
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.halt_reg = 0x8a000,
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.halt_check = BRANCH_HALT,
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.clkr = {
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.enable_reg = 0x8a000,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "gcc_mss_cfg_ahb_clk",
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_branch gcc_mss_mfab_axis_clk = {
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.halt_reg = 0x8a004,
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.halt_check = BRANCH_HALT_VOTED,
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.clkr = {
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.enable_reg = 0x8a004,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "gcc_mss_mfab_axis_clk",
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_branch gcc_mss_nav_axi_clk = {
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.halt_reg = 0x8a00c,
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.halt_check = BRANCH_HALT_VOTED,
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.clkr = {
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.enable_reg = 0x8a00c,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "gcc_mss_nav_axi_clk",
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_branch gcc_mss_snoc_axi_clk = {
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.halt_reg = 0x8a150,
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.halt_check = BRANCH_HALT,
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.clkr = {
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.enable_reg = 0x8a150,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "gcc_mss_snoc_axi_clk",
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct clk_branch gcc_mss_q6_memnoc_axi_clk = {
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.halt_reg = 0x8a154,
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.halt_check = BRANCH_HALT,
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.clkr = {
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.enable_reg = 0x8a154,
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.enable_mask = BIT(0),
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.hw.init = &(struct clk_init_data){
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.name = "gcc_mss_q6_memnoc_axi_clk",
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.ops = &clk_branch2_ops,
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},
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},
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};
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static struct gdsc ufs_phy_gdsc = {
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.gdscr = 0x77004,
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.pd = {
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@ -2336,6 +2401,11 @@ static struct clk_regmap *gcc_sc7180_clocks[] = {
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[GPLL7] = &gpll7.clkr,
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[GPLL4] = &gpll4.clkr,
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[GPLL1] = &gpll1.clkr,
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[GCC_MSS_CFG_AHB_CLK] = &gcc_mss_cfg_ahb_clk.clkr,
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[GCC_MSS_MFAB_AXIS_CLK] = &gcc_mss_mfab_axis_clk.clkr,
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[GCC_MSS_NAV_AXI_CLK] = &gcc_mss_nav_axi_clk.clkr,
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[GCC_MSS_Q6_MEMNOC_AXI_CLK] = &gcc_mss_q6_memnoc_axi_clk.clkr,
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[GCC_MSS_SNOC_AXI_CLK] = &gcc_mss_snoc_axi_clk.clkr,
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};
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static const struct qcom_reset_map gcc_sc7180_resets[] = {
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