MIPS: Use the new byteorder headers
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -11,11 +11,19 @@
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#include <linux/compiler.h>
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#include <asm/types.h>
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#ifdef __GNUC__
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#if defined(__MIPSEB__)
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# define __BIG_ENDIAN
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#elif defined(__MIPSEL__)
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# define __LITTLE_ENDIAN
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#else
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# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
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#endif
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#define __SWAB_64_THRU_32__
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#ifdef CONFIG_CPU_MIPSR2
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static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
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static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
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{
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__asm__(
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" wsbh %0, %1 \n"
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@ -24,9 +32,9 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
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return x;
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}
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#define __arch__swab16(x) ___arch__swab16(x)
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#define __arch_swab16 __arch_swab16
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static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
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static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
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{
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__asm__(
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" wsbh %0, %1 \n"
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@ -36,11 +44,10 @@ static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
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return x;
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}
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#define __arch__swab32(x) ___arch__swab32(x)
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#define __arch_swab32 __arch_swab32
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#ifdef CONFIG_CPU_MIPS64_R2
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static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
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static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
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{
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__asm__(
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" dsbh %0, %1 \n"
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@ -51,26 +58,11 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
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return x;
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}
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#define __arch__swab64(x) ___arch__swab64(x)
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#define __arch_swab64 __arch_swab64
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#endif /* CONFIG_CPU_MIPS64_R2 */
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#endif /* CONFIG_CPU_MIPSR2 */
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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# define __BYTEORDER_HAS_U64__
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# define __SWAB_64_THRU_32__
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#endif
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#endif /* __GNUC__ */
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#if defined(__MIPSEB__)
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# include <linux/byteorder/big_endian.h>
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#elif defined(__MIPSEL__)
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# include <linux/byteorder/little_endian.h>
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#else
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# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
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#endif
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#include <linux/byteorder.h>
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#endif /* _ASM_BYTEORDER_H */
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