drm/i915/icl: Enable ICL Pipe CSC block
Enable ICL pipe csc hardware. CSC block is enabled in CSC_MODE register instead of PLANE_COLOR_CTL. ToDO: Extend the ABI to accept 32 bit coefficient values instead of 16bit for future platforms. v2: Addressed Maarten's review comments. v3: Addressed Matt's review comments. Removed rmw patterns as suggested by Matt. v4: Addressed Matt's review comments. v5: Addressed Ville's review comments. v6: Separated pipe output csc programming from regular csc. v7: Rebase Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1549893025-21837-4-git-send-email-uma.shankar@intel.com
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@ -9885,10 +9885,13 @@ enum skl_power_gate {
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#define _PIPE_A_CSC_COEFF_BU 0x4901c
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#define _PIPE_A_CSC_COEFF_RV_GV 0x49020
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#define _PIPE_A_CSC_COEFF_BV 0x49024
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#define _PIPE_A_CSC_MODE 0x49028
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#define CSC_BLACK_SCREEN_OFFSET (1 << 2)
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#define CSC_POSITION_BEFORE_GAMMA (1 << 1)
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#define CSC_MODE_YUV_TO_RGB (1 << 0)
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#define ICL_CSC_ENABLE (1 << 31)
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#define CSC_BLACK_SCREEN_OFFSET (1 << 2)
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#define CSC_POSITION_BEFORE_GAMMA (1 << 1)
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#define CSC_MODE_YUV_TO_RGB (1 << 0)
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#define _PIPE_A_CSC_PREOFF_HI 0x49030
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#define _PIPE_A_CSC_PREOFF_ME 0x49034
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#define _PIPE_A_CSC_PREOFF_LO 0x49038
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@ -243,7 +243,10 @@ static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state)
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I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), postoff);
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I915_WRITE(PIPE_CSC_POSTOFF_LO(pipe), postoff);
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I915_WRITE(PIPE_CSC_MODE(pipe), 0);
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if (INTEL_GEN(dev_priv) >= 11)
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I915_WRITE(PIPE_CSC_MODE(pipe), ICL_CSC_ENABLE);
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else
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I915_WRITE(PIPE_CSC_MODE(pipe), 0);
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} else {
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u32 mode = CSC_MODE_YUV_TO_RGB;
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