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clk: multiplier: Prevent the multiplier from under / over flowing 

In the current multiplier base clock implementation, if the
CLK_SET_RATE_PARENT flag isn't set, the code will not make sure that the
multiplier computed remains within the boundaries of our clock.

This means that if the clock we want to reach is below the parent rate,
or if the multiplier is above the maximum that we can reach, we will end up
with a completely bogus one that the clock cannot achieve.

Fixes: f2e0a53271 ("clk: Add a basic multiplier clock")
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1463402840-17062-3-git-send-email-maxime.ripard@free-electrons.com
hifive-unleashed-5.1
Maxime Ripard 2016-05-16 14:47:02 +02:00 committed by Michael Turquette
parent 071a0cb66c
commit 25f77a3aa4
1 changed files with 17 additions and 3 deletions
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20
drivers/clk/clk-multiplier.c
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@ -52,14 +52,28 @@ static unsigned long __bestmult(struct clk_hw *hw, unsigned long rate,
unsigned long *best_parent_rate,
u8 width, unsigned long flags)
{
struct clk_multiplier *mult = to_clk_multiplier(hw);
unsigned long orig_parent_rate = *best_parent_rate;
unsigned long parent_rate, current_rate, best_rate = ~0;
unsigned int i, bestmult = 0;
unsigned int maxmult = (1 << width) - 1;
if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT))
return rate / *best_parent_rate;
if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) {
bestmult = rate / orig_parent_rate;
for (i = 1; i < ((1 << width) - 1); i++) {
/* Make sure we don't end up with a 0 multiplier */
if ((bestmult == 0) &&
!(mult->flags & CLK_MULTIPLIER_ZERO_BYPASS))
bestmult = 1;
/* Make sure we don't overflow the multiplier */
if (bestmult > maxmult)
bestmult = maxmult;
return bestmult;
}
for (i = 1; i < maxmult; i++) {
if (rate == orig_parent_rate * i) {
/*
* This is the best case for us if we have a