arch timer GTDT patches
- arch_timer cleanups and refactoring - new common GTDT parser - GTDT-based MMIO arch_timer support - GTDT-based SBSA watchdog support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJY94xuAAoJEN97mGXxSWJIydYQAIoanIR8RmDLjtIfV4RMkjIj BKr3IADjihtJY3B418OAoK8WzkVGwWILNw6rCMr7HvvDqBEEjcyukeO8vT4CMMBp pkh/2tZFpNLLOBJidDPKlw/m1bUlCsIyC2TwuiqEyvlUQtkSmqVCYJCSgmuVHF0e bMydjxslfI1v6HvhkVTN+y95ocakv3YfEpWrwRTEIqcwIzvQPo6bfjzrGFluoDRO 8lJT3Z4Q4ibvr8C3Y/UL/nOX2xBaGFR51G2/ILsLxzt7alStqnzXfL6h1dl5ySY2 rTXgbg5iH8k/8lQjYLLh1/UV3w0vdCg5HXFnbxPcfIA9BjaQvH4+CJowk69anHIC 4R7kiHsc6SOEyiQFWdjVGqy8vajokgskKbqEhktGiZUA4IIUd7jvFzK1l9r6IJnc X/zM49fxR7cYwjJcNtEqzCtZmUt5h8JMWGqAm/Ei38+HWroVlnc4/o+hTAU4vgj9 +054NjdJp+0idm6PjIhCdufqH6AzCWRpyt8I9Qo/P+VaJyytiwn/6QBLNs79KA+q QrLCYsPUWiTX8yR/y6v4obZSn0j0DnZM9tZOzr/cZH0D9Z0pXSoybspbS7vUMczd 4JhlSYKEycUqcu8J+jvh8HKANFZcMdyegO3bUKQ1ZlhpoyLml4H10dbOSHcIcU3c eN6zY6RmvxvqwFJf9P2v =KBll -----END PGP SIGNATURE----- Merge tag 'arch-timer-gtdt' of git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux into timers/core Pull arch timer GTDT support from Mark Rutland - arch_timer cleanups and refactoring - new common GTDT parser - GTDT-based MMIO arch_timer support - GTDT-based SBSA watchdog support Fix up a trivial pr_err() conflict.hifive-unleashed-5.1
Thomas Gleixner
commit
26e42a0204
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@ -2,6 +2,7 @@ config ARM64
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def_bool y
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select ACPI_CCA_REQUIRED if ACPI
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select ACPI_GENERIC_GSI if ACPI
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select ACPI_GTDT if ACPI
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select ACPI_REDUCED_HARDWARE_ONLY if ACPI
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select ACPI_MCFG if ACPI
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select ACPI_SPCR_TABLE if ACPI
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@ -4,3 +4,6 @@
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config ACPI_IORT
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bool
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config ACPI_GTDT
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bool
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@ -1 +1,2 @@
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obj-$(CONFIG_ACPI_IORT) += iort.o
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obj-$(CONFIG_ACPI_GTDT) += gtdt.o
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@ -0,0 +1,417 @@
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/*
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* ARM Specific GTDT table Support
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*
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* Copyright (C) 2016, Linaro Ltd.
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* Author: Daniel Lezcano <daniel.lezcano@linaro.org>
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* Fu Wei <fu.wei@linaro.org>
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* Hanjun Guo <hanjun.guo@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <clocksource/arm_arch_timer.h>
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#undef pr_fmt
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#define pr_fmt(fmt) "ACPI GTDT: " fmt
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/**
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* struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions
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* @gtdt: The pointer to the struct acpi_table_gtdt of GTDT table.
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* @gtdt_end: The pointer to the end of GTDT table.
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* @platform_timer: The pointer to the start of Platform Timer Structure
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*
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* The struct store the key info of GTDT table, it should be initialized by
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* acpi_gtdt_init.
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*/
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struct acpi_gtdt_descriptor {
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struct acpi_table_gtdt *gtdt;
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void *gtdt_end;
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void *platform_timer;
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};
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static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
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static inline void *next_platform_timer(void *platform_timer)
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{
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struct acpi_gtdt_header *gh = platform_timer;
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platform_timer += gh->length;
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if (platform_timer < acpi_gtdt_desc.gtdt_end)
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return platform_timer;
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return NULL;
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}
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#define for_each_platform_timer(_g) \
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for (_g = acpi_gtdt_desc.platform_timer; _g; \
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_g = next_platform_timer(_g))
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static inline bool is_timer_block(void *platform_timer)
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{
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struct acpi_gtdt_header *gh = platform_timer;
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return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
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}
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static inline bool is_non_secure_watchdog(void *platform_timer)
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{
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struct acpi_gtdt_header *gh = platform_timer;
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struct acpi_gtdt_watchdog *wd = platform_timer;
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if (gh->type != ACPI_GTDT_TYPE_WATCHDOG)
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return false;
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return !(wd->timer_flags & ACPI_GTDT_WATCHDOG_SECURE);
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}
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static int __init map_gt_gsi(u32 interrupt, u32 flags)
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{
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int trigger, polarity;
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trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
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: ACPI_LEVEL_SENSITIVE;
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polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
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: ACPI_ACTIVE_HIGH;
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return acpi_register_gsi(NULL, interrupt, trigger, polarity);
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}
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/**
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* acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer.
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* @type: the type of PPI.
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*
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* Note: Secure state is not managed by the kernel on ARM64 systems.
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* So we only handle the non-secure timer PPIs,
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* ARCH_TIMER_PHYS_SECURE_PPI is treated as invalid type.
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*
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* Return: the mapped PPI value, 0 if error.
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*/
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int __init acpi_gtdt_map_ppi(int type)
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{
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struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
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switch (type) {
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case ARCH_TIMER_PHYS_NONSECURE_PPI:
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return map_gt_gsi(gtdt->non_secure_el1_interrupt,
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gtdt->non_secure_el1_flags);
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case ARCH_TIMER_VIRT_PPI:
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return map_gt_gsi(gtdt->virtual_timer_interrupt,
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gtdt->virtual_timer_flags);
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case ARCH_TIMER_HYP_PPI:
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return map_gt_gsi(gtdt->non_secure_el2_interrupt,
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gtdt->non_secure_el2_flags);
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default:
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pr_err("Failed to map timer interrupt: invalid type.\n");
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}
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return 0;
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}
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/**
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* acpi_gtdt_c3stop() - Got c3stop info from GTDT according to the type of PPI.
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* @type: the type of PPI.
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*
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* Return: true if the timer HW state is lost when a CPU enters an idle state,
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* false otherwise
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*/
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bool __init acpi_gtdt_c3stop(int type)
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{
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struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
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switch (type) {
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case ARCH_TIMER_PHYS_NONSECURE_PPI:
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return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
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case ARCH_TIMER_VIRT_PPI:
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return !(gtdt->virtual_timer_flags & ACPI_GTDT_ALWAYS_ON);
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case ARCH_TIMER_HYP_PPI:
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return !(gtdt->non_secure_el2_flags & ACPI_GTDT_ALWAYS_ON);
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default:
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pr_err("Failed to get c3stop info: invalid type.\n");
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}
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return false;
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}
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/**
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* acpi_gtdt_init() - Get the info of GTDT table to prepare for further init.
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* @table: The pointer to GTDT table.
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* @platform_timer_count: It points to a integer variable which is used
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* for storing the number of platform timers.
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* This pointer could be NULL, if the caller
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* doesn't need this info.
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*
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* Return: 0 if success, -EINVAL if error.
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*/
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int __init acpi_gtdt_init(struct acpi_table_header *table,
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int *platform_timer_count)
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{
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void *platform_timer;
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struct acpi_table_gtdt *gtdt;
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gtdt = container_of(table, struct acpi_table_gtdt, header);
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acpi_gtdt_desc.gtdt = gtdt;
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acpi_gtdt_desc.gtdt_end = (void *)table + table->length;
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acpi_gtdt_desc.platform_timer = NULL;
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if (platform_timer_count)
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*platform_timer_count = 0;
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if (table->revision < 2) {
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pr_warn("Revision:%d doesn't support Platform Timers.\n",
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table->revision);
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return 0;
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}
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if (!gtdt->platform_timer_count) {
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pr_debug("No Platform Timer.\n");
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return 0;
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}
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platform_timer = (void *)gtdt + gtdt->platform_timer_offset;
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if (platform_timer < (void *)table + sizeof(struct acpi_table_gtdt)) {
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pr_err(FW_BUG "invalid timer data.\n");
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return -EINVAL;
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}
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acpi_gtdt_desc.platform_timer = platform_timer;
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if (platform_timer_count)
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*platform_timer_count = gtdt->platform_timer_count;
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return 0;
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}
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static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block *block,
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struct arch_timer_mem *timer_mem)
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{
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int i;
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struct arch_timer_mem_frame *frame;
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struct acpi_gtdt_timer_entry *gtdt_frame;
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if (!block->timer_count) {
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pr_err(FW_BUG "GT block present, but frame count is zero.");
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return -ENODEV;
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}
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if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {
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pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 8\n",
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block->timer_count);
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return -EINVAL;
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}
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timer_mem->cntctlbase = (phys_addr_t)block->block_address;
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/*
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* The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC).
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* See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3
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* "CNTCTLBase memory map".
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*/
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timer_mem->size = SZ_4K;
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gtdt_frame = (void *)block + block->timer_offset;
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if (gtdt_frame + block->timer_count != (void *)block + block->header.length)
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return -EINVAL;
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/*
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* Get the GT timer Frame data for every GT Block Timer
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*/
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for (i = 0; i < block->timer_count; i++, gtdt_frame++) {
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if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)
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continue;
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if (gtdt_frame->frame_number >= ARCH_TIMER_MEM_MAX_FRAMES ||
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!gtdt_frame->base_address || !gtdt_frame->timer_interrupt)
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goto error;
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frame = &timer_mem->frame[gtdt_frame->frame_number];
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/* duplicate frame */
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if (frame->valid)
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goto error;
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frame->phys_irq = map_gt_gsi(gtdt_frame->timer_interrupt,
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gtdt_frame->timer_flags);
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if (frame->phys_irq <= 0) {
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pr_warn("failed to map physical timer irq in frame %d.\n",
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gtdt_frame->frame_number);
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goto error;
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}
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if (gtdt_frame->virtual_timer_interrupt) {
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frame->virt_irq =
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map_gt_gsi(gtdt_frame->virtual_timer_interrupt,
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gtdt_frame->virtual_timer_flags);
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if (frame->virt_irq <= 0) {
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pr_warn("failed to map virtual timer irq in frame %d.\n",
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gtdt_frame->frame_number);
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goto error;
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}
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} else {
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pr_debug("virtual timer in frame %d not implemented.\n",
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gtdt_frame->frame_number);
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}
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frame->cntbase = gtdt_frame->base_address;
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/*
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* The CNTBaseN frame is 4KB (register offsets 0x000 - 0xFFC).
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* See ARM DDI 0487A.k_iss10775, page I1-5130, Table I1-4
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* "CNTBaseN memory map".
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*/
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frame->size = SZ_4K;
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frame->valid = true;
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}
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return 0;
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error:
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do {
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if (gtdt_frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER ||
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gtdt_frame->frame_number >= ARCH_TIMER_MEM_MAX_FRAMES)
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continue;
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frame = &timer_mem->frame[gtdt_frame->frame_number];
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if (frame->phys_irq > 0)
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acpi_unregister_gsi(gtdt_frame->timer_interrupt);
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frame->phys_irq = 0;
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if (frame->virt_irq > 0)
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acpi_unregister_gsi(gtdt_frame->virtual_timer_interrupt);
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frame->virt_irq = 0;
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} while (i-- >= 0 && gtdt_frame--);
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return -EINVAL;
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}
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/**
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* acpi_arch_timer_mem_init() - Get the info of all GT blocks in GTDT table.
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* @timer_mem: The pointer to the array of struct arch_timer_mem for returning
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* the result of parsing. The element number of this array should
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* be platform_timer_count(the total number of platform timers).
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* @timer_count: It points to a integer variable which is used for storing the
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* number of GT blocks we have parsed.
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*
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* Return: 0 if success, -EINVAL/-ENODEV if error.
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*/
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int __init acpi_arch_timer_mem_init(struct arch_timer_mem *timer_mem,
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int *timer_count)
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{
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int ret;
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void *platform_timer;
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*timer_count = 0;
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for_each_platform_timer(platform_timer) {
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if (is_timer_block(platform_timer)) {
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ret = gtdt_parse_timer_block(platform_timer, timer_mem);
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if (ret)
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return ret;
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timer_mem++;
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(*timer_count)++;
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}
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}
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if (*timer_count)
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pr_info("found %d memory-mapped timer block(s).\n",
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*timer_count);
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return 0;
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}
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/*
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* Initialize a SBSA generic Watchdog platform device info from GTDT
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*/
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static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
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int index)
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{
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struct platform_device *pdev;
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int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);
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/*
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* According to SBSA specification the size of refresh and control
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* frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).
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*/
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struct resource res[] = {
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DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),
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DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),
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DEFINE_RES_IRQ(irq),
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};
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int nr_res = ARRAY_SIZE(res);
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pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",
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wd->refresh_frame_address, wd->control_frame_address,
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wd->timer_interrupt, wd->timer_flags);
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if (!(wd->refresh_frame_address && wd->control_frame_address)) {
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pr_err(FW_BUG "failed to get the Watchdog base address.\n");
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acpi_unregister_gsi(wd->timer_interrupt);
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return -EINVAL;
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}
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if (irq <= 0) {
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pr_warn("failed to map the Watchdog interrupt.\n");
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nr_res--;
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}
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/*
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* Add a platform device named "sbsa-gwdt" to match the platform driver.
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* "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog
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* The platform driver can get device info below by matching this name.
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*/
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pdev = platform_device_register_simple("sbsa-gwdt", index, res, nr_res);
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if (IS_ERR(pdev)) {
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acpi_unregister_gsi(wd->timer_interrupt);
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return PTR_ERR(pdev);
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}
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return 0;
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}
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static int __init gtdt_sbsa_gwdt_init(void)
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{
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void *platform_timer;
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struct acpi_table_header *table;
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int ret, timer_count, gwdt_count = 0;
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if (acpi_disabled)
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return 0;
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if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table)))
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return -EINVAL;
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/*
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* Note: Even though the global variable acpi_gtdt_desc has been
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* initialized by acpi_gtdt_init() while initializing the arch timers,
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* when we call this function to get SBSA watchdogs info from GTDT, the
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* pointers stashed in it are stale (since they are early temporary
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* mappings carried out before acpi_permanent_mmap is set) and we need
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* to re-initialize them with permanent mapped pointer values to let the
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* GTDT parsing possible.
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*/
|
||||
ret = acpi_gtdt_init(table, &timer_count);
|
||||
if (ret || !timer_count)
|
||||
return ret;
|
||||
|
||||
for_each_platform_timer(platform_timer) {
|
||||
if (is_non_secure_watchdog(platform_timer)) {
|
||||
ret = gtdt_import_sbsa_gwdt(platform_timer, gwdt_count);
|
||||
if (ret)
|
||||
break;
|
||||
gwdt_count++;
|
||||
}
|
||||
}
|
||||
|
||||
if (gwdt_count)
|
||||
pr_info("found %d SBSA generic Watchdog(s).\n", gwdt_count);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
device_initcall(gtdt_sbsa_gwdt_init);
|
||||
|
|
@ -33,6 +33,9 @@
|
|||
|
||||
#include <clocksource/arm_arch_timer.h>
|
||||
|
||||
#undef pr_fmt
|
||||
#define pr_fmt(fmt) "arch_timer: " fmt
|
||||
|
||||
#define CNTTIDR 0x08
|
||||
#define CNTTIDR_VIRT(n) (BIT(1) << ((n) * 4))
|
||||
|
||||
|
|
@ -52,8 +55,6 @@
|
|||
#define CNTV_TVAL 0x38
|
||||
#define CNTV_CTL 0x3c
|
||||
|
||||
#define ARCH_CP15_TIMER BIT(0)
|
||||
#define ARCH_MEM_TIMER BIT(1)
|
||||
static unsigned arch_timers_present __initdata;
|
||||
|
||||
static void __iomem *arch_counter_base;
|
||||
|
|
@ -66,20 +67,11 @@ struct arch_timer {
|
|||
#define to_arch_timer(e) container_of(e, struct arch_timer, evt)
|
||||
|
||||
static u32 arch_timer_rate;
|
||||
|
||||
enum ppi_nr {
|
||||
PHYS_SECURE_PPI,
|
||||
PHYS_NONSECURE_PPI,
|
||||
VIRT_PPI,
|
||||
HYP_PPI,
|
||||
MAX_TIMER_PPI
|
||||
};
|
||||
|
||||
static int arch_timer_ppi[MAX_TIMER_PPI];
|
||||
static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI];
|
||||
|
||||
static struct clock_event_device __percpu *arch_timer_evt;
|
||||
|
||||
static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI;
|
||||
static enum arch_timer_ppi_nr arch_timer_uses_ppi = ARCH_TIMER_VIRT_PPI;
|
||||
static bool arch_timer_c3stop;
|
||||
static bool arch_timer_mem_use_virtual;
|
||||
static bool arch_counter_suspend_stop;
|
||||
|
|
@ -683,7 +675,7 @@ static void __arch_timer_setup(unsigned type,
|
|||
{
|
||||
clk->features = CLOCK_EVT_FEAT_ONESHOT;
|
||||
|
||||
if (type == ARCH_CP15_TIMER) {
|
||||
if (type == ARCH_TIMER_TYPE_CP15) {
|
||||
if (arch_timer_c3stop)
|
||||
clk->features |= CLOCK_EVT_FEAT_C3STOP;
|
||||
clk->name = "arch_sys_timer";
|
||||
|
|
@ -691,14 +683,14 @@ static void __arch_timer_setup(unsigned type,
|
|||
clk->cpumask = cpumask_of(smp_processor_id());
|
||||
clk->irq = arch_timer_ppi[arch_timer_uses_ppi];
|
||||
switch (arch_timer_uses_ppi) {
|
||||
case VIRT_PPI:
|
||||
case ARCH_TIMER_VIRT_PPI:
|
||||
clk->set_state_shutdown = arch_timer_shutdown_virt;
|
||||
clk->set_state_oneshot_stopped = arch_timer_shutdown_virt;
|
||||
clk->set_next_event = arch_timer_set_next_event_virt;
|
||||
break;
|
||||
case PHYS_SECURE_PPI:
|
||||
case PHYS_NONSECURE_PPI:
|
||||
case HYP_PPI:
|
||||
case ARCH_TIMER_PHYS_SECURE_PPI:
|
||||
case ARCH_TIMER_PHYS_NONSECURE_PPI:
|
||||
case ARCH_TIMER_HYP_PPI:
|
||||
clk->set_state_shutdown = arch_timer_shutdown_phys;
|
||||
clk->set_state_oneshot_stopped = arch_timer_shutdown_phys;
|
||||
clk->set_next_event = arch_timer_set_next_event_phys;
|
||||
|
|
@ -786,8 +778,8 @@ static void arch_counter_set_user_access(void)
|
|||
|
||||
static bool arch_timer_has_nonsecure_ppi(void)
|
||||
{
|
||||
return (arch_timer_uses_ppi == PHYS_SECURE_PPI &&
|
||||
arch_timer_ppi[PHYS_NONSECURE_PPI]);
|
||||
return (arch_timer_uses_ppi == ARCH_TIMER_PHYS_SECURE_PPI &&
|
||||
arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]);
|
||||
}
|
||||
|
||||
static u32 check_ppi_trigger(int irq)
|
||||
|
|
@ -808,14 +800,15 @@ static int arch_timer_starting_cpu(unsigned int cpu)
|
|||
struct clock_event_device *clk = this_cpu_ptr(arch_timer_evt);
|
||||
u32 flags;
|
||||
|
||||
__arch_timer_setup(ARCH_CP15_TIMER, clk);
|
||||
__arch_timer_setup(ARCH_TIMER_TYPE_CP15, clk);
|
||||
|
||||
flags = check_ppi_trigger(arch_timer_ppi[arch_timer_uses_ppi]);
|
||||
enable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], flags);
|
||||
|
||||
if (arch_timer_has_nonsecure_ppi()) {
|
||||
flags = check_ppi_trigger(arch_timer_ppi[PHYS_NONSECURE_PPI]);
|
||||
enable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI], flags);
|
||||
flags = check_ppi_trigger(arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]);
|
||||
enable_percpu_irq(arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI],
|
||||
flags);
|
||||
}
|
||||
|
||||
arch_counter_set_user_access();
|
||||
|
|
@ -825,43 +818,39 @@ static int arch_timer_starting_cpu(unsigned int cpu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
|
||||
/*
|
||||
* For historical reasons, when probing with DT we use whichever (non-zero)
|
||||
* rate was probed first, and don't verify that others match. If the first node
|
||||
* probed has a clock-frequency property, this overrides the HW register.
|
||||
*/
|
||||
static void arch_timer_of_configure_rate(u32 rate, struct device_node *np)
|
||||
{
|
||||
/* Who has more than one independent system counter? */
|
||||
if (arch_timer_rate)
|
||||
return;
|
||||
|
||||
/*
|
||||
* Try to determine the frequency from the device tree or CNTFRQ,
|
||||
* if ACPI is enabled, get the frequency from CNTFRQ ONLY.
|
||||
*/
|
||||
if (!acpi_disabled ||
|
||||
of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) {
|
||||
if (cntbase)
|
||||
arch_timer_rate = readl_relaxed(cntbase + CNTFRQ);
|
||||
else
|
||||
arch_timer_rate = arch_timer_get_cntfrq();
|
||||
}
|
||||
if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
|
||||
arch_timer_rate = rate;
|
||||
|
||||
/* Check the timer frequency. */
|
||||
if (arch_timer_rate == 0)
|
||||
pr_warn("Architected timer frequency not available\n");
|
||||
pr_warn("frequency not available\n");
|
||||
}
|
||||
|
||||
static void arch_timer_banner(unsigned type)
|
||||
{
|
||||
pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
|
||||
type & ARCH_CP15_TIMER ? "cp15" : "",
|
||||
type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "",
|
||||
type & ARCH_MEM_TIMER ? "mmio" : "",
|
||||
(unsigned long)arch_timer_rate / 1000000,
|
||||
(unsigned long)(arch_timer_rate / 10000) % 100,
|
||||
type & ARCH_CP15_TIMER ?
|
||||
(arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" :
|
||||
pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
|
||||
type & ARCH_TIMER_TYPE_CP15 ? "cp15" : "",
|
||||
type == (ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM) ?
|
||||
" and " : "",
|
||||
type & ARCH_TIMER_TYPE_MEM ? "mmio" : "",
|
||||
(unsigned long)arch_timer_rate / 1000000,
|
||||
(unsigned long)(arch_timer_rate / 10000) % 100,
|
||||
type & ARCH_TIMER_TYPE_CP15 ?
|
||||
(arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) ? "virt" : "phys" :
|
||||
"",
|
||||
type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "",
|
||||
type & ARCH_MEM_TIMER ?
|
||||
type == (ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM) ? "/" : "",
|
||||
type & ARCH_TIMER_TYPE_MEM ?
|
||||
arch_timer_mem_use_virtual ? "virt" : "phys" :
|
||||
"");
|
||||
}
|
||||
|
|
@ -896,8 +885,9 @@ static void __init arch_counter_register(unsigned type)
|
|||
u64 start_count;
|
||||
|
||||
/* Register the CP15 based counter if we have one */
|
||||
if (type & ARCH_CP15_TIMER) {
|
||||
if (IS_ENABLED(CONFIG_ARM64) || arch_timer_uses_ppi == VIRT_PPI)
|
||||
if (type & ARCH_TIMER_TYPE_CP15) {
|
||||
if (IS_ENABLED(CONFIG_ARM64) ||
|
||||
arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI)
|
||||
arch_timer_read_counter = arch_counter_get_cntvct;
|
||||
else
|
||||
arch_timer_read_counter = arch_counter_get_cntpct;
|
||||
|
|
@ -922,12 +912,11 @@ static void __init arch_counter_register(unsigned type)
|
|||
|
||||
static void arch_timer_stop(struct clock_event_device *clk)
|
||||
{
|
||||
pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n",
|
||||
clk->irq, smp_processor_id());
|
||||
pr_debug("disable IRQ%d cpu #%d\n", clk->irq, smp_processor_id());
|
||||
|
||||
disable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi]);
|
||||
if (arch_timer_has_nonsecure_ppi())
|
||||
disable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI]);
|
||||
disable_percpu_irq(arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]);
|
||||
|
||||
clk->set_state_shutdown(clk);
|
||||
}
|
||||
|
|
@ -990,24 +979,24 @@ static int __init arch_timer_register(void)
|
|||
|
||||
ppi = arch_timer_ppi[arch_timer_uses_ppi];
|
||||
switch (arch_timer_uses_ppi) {
|
||||
case VIRT_PPI:
|
||||
case ARCH_TIMER_VIRT_PPI:
|
||||
err = request_percpu_irq(ppi, arch_timer_handler_virt,
|
||||
"arch_timer", arch_timer_evt);
|
||||
break;
|
||||
case PHYS_SECURE_PPI:
|
||||
case PHYS_NONSECURE_PPI:
|
||||
case ARCH_TIMER_PHYS_SECURE_PPI:
|
||||
case ARCH_TIMER_PHYS_NONSECURE_PPI:
|
||||
err = request_percpu_irq(ppi, arch_timer_handler_phys,
|
||||
"arch_timer", arch_timer_evt);
|
||||
if (!err && arch_timer_ppi[PHYS_NONSECURE_PPI]) {
|
||||
ppi = arch_timer_ppi[PHYS_NONSECURE_PPI];
|
||||
if (!err && arch_timer_has_nonsecure_ppi()) {
|
||||
ppi = arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI];
|
||||
err = request_percpu_irq(ppi, arch_timer_handler_phys,
|
||||
"arch_timer", arch_timer_evt);
|
||||
if (err)
|
||||
free_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI],
|
||||
free_percpu_irq(arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI],
|
||||
arch_timer_evt);
|
||||
}
|
||||
break;
|
||||
case HYP_PPI:
|
||||
case ARCH_TIMER_HYP_PPI:
|
||||
err = request_percpu_irq(ppi, arch_timer_handler_phys,
|
||||
"arch_timer", arch_timer_evt);
|
||||
break;
|
||||
|
|
@ -1016,8 +1005,7 @@ static int __init arch_timer_register(void)
|
|||
}
|
||||
|
||||
if (err) {
|
||||
pr_err("arch_timer: can't register interrupt %d (%d)\n",
|
||||
ppi, err);
|
||||
pr_err("can't register interrupt %d (%d)\n", ppi, err);
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
|
|
@ -1040,7 +1028,7 @@ out_unreg_cpupm:
|
|||
out_unreg_notify:
|
||||
free_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], arch_timer_evt);
|
||||
if (arch_timer_has_nonsecure_ppi())
|
||||
free_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI],
|
||||
free_percpu_irq(arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI],
|
||||
arch_timer_evt);
|
||||
|
||||
out_free:
|
||||
|
|
@ -1061,7 +1049,7 @@ static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq)
|
|||
|
||||
t->base = base;
|
||||
t->evt.irq = irq;
|
||||
__arch_timer_setup(ARCH_MEM_TIMER, &t->evt);
|
||||
__arch_timer_setup(ARCH_TIMER_TYPE_MEM, &t->evt);
|
||||
|
||||
if (arch_timer_mem_use_virtual)
|
||||
func = arch_timer_handler_virt_mem;
|
||||
|
|
@ -1070,7 +1058,7 @@ static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq)
|
|||
|
||||
ret = request_irq(irq, func, IRQF_TIMER, "arch_mem_timer", &t->evt);
|
||||
if (ret) {
|
||||
pr_err("arch_timer: Failed to request mem timer irq\n");
|
||||
pr_err("Failed to request mem timer irq\n");
|
||||
kfree(t);
|
||||
}
|
||||
|
||||
|
|
@ -1088,15 +1076,28 @@ static const struct of_device_id arch_timer_mem_of_match[] __initconst = {
|
|||
{},
|
||||
};
|
||||
|
||||
static bool __init
|
||||
arch_timer_needs_probing(int type, const struct of_device_id *matches)
|
||||
static bool __init arch_timer_needs_of_probing(void)
|
||||
{
|
||||
struct device_node *dn;
|
||||
bool needs_probing = false;
|
||||
unsigned int mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
|
||||
|
||||
dn = of_find_matching_node(NULL, matches);
|
||||
if (dn && of_device_is_available(dn) && !(arch_timers_present & type))
|
||||
/* We have two timers, and both device-tree nodes are probed. */
|
||||
if ((arch_timers_present & mask) == mask)
|
||||
return false;
|
||||
|
||||
/*
|
||||
* Only one type of timer is probed,
|
||||
* check if we have another type of timer node in device-tree.
|
||||
*/
|
||||
if (arch_timers_present & ARCH_TIMER_TYPE_CP15)
|
||||
dn = of_find_matching_node(NULL, arch_timer_mem_of_match);
|
||||
else
|
||||
dn = of_find_matching_node(NULL, arch_timer_of_match);
|
||||
|
||||
if (dn && of_device_is_available(dn))
|
||||
needs_probing = true;
|
||||
|
||||
of_node_put(dn);
|
||||
|
||||
return needs_probing;
|
||||
|
|
@ -1104,82 +1105,61 @@ arch_timer_needs_probing(int type, const struct of_device_id *matches)
|
|||
|
||||
static int __init arch_timer_common_init(void)
|
||||
{
|
||||
unsigned mask = ARCH_CP15_TIMER | ARCH_MEM_TIMER;
|
||||
|
||||
/* Wait until both nodes are probed if we have two timers */
|
||||
if ((arch_timers_present & mask) != mask) {
|
||||
if (arch_timer_needs_probing(ARCH_MEM_TIMER, arch_timer_mem_of_match))
|
||||
return 0;
|
||||
if (arch_timer_needs_probing(ARCH_CP15_TIMER, arch_timer_of_match))
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_timer_banner(arch_timers_present);
|
||||
arch_counter_register(arch_timers_present);
|
||||
return arch_timer_arch_init();
|
||||
}
|
||||
|
||||
static int __init arch_timer_init(void)
|
||||
/**
|
||||
* arch_timer_select_ppi() - Select suitable PPI for the current system.
|
||||
*
|
||||
* If HYP mode is available, we know that the physical timer
|
||||
* has been configured to be accessible from PL1. Use it, so
|
||||
* that a guest can use the virtual timer instead.
|
||||
*
|
||||
* On ARMv8.1 with VH extensions, the kernel runs in HYP. VHE
|
||||
* accesses to CNTP_*_EL1 registers are silently redirected to
|
||||
* their CNTHP_*_EL2 counterparts, and use a different PPI
|
||||
* number.
|
||||
*
|
||||
* If no interrupt provided for virtual timer, we'll have to
|
||||
* stick to the physical timer. It'd better be accessible...
|
||||
* For arm64 we never use the secure interrupt.
|
||||
*
|
||||
* Return: a suitable PPI type for the current system.
|
||||
*/
|
||||
static enum arch_timer_ppi_nr __init arch_timer_select_ppi(void)
|
||||
{
|
||||
int ret;
|
||||
/*
|
||||
* If HYP mode is available, we know that the physical timer
|
||||
* has been configured to be accessible from PL1. Use it, so
|
||||
* that a guest can use the virtual timer instead.
|
||||
*
|
||||
* If no interrupt provided for virtual timer, we'll have to
|
||||
* stick to the physical timer. It'd better be accessible...
|
||||
*
|
||||
* On ARMv8.1 with VH extensions, the kernel runs in HYP. VHE
|
||||
* accesses to CNTP_*_EL1 registers are silently redirected to
|
||||
* their CNTHP_*_EL2 counterparts, and use a different PPI
|
||||
* number.
|
||||
*/
|
||||
if (is_hyp_mode_available() || !arch_timer_ppi[VIRT_PPI]) {
|
||||
bool has_ppi;
|
||||
if (is_kernel_in_hyp_mode())
|
||||
return ARCH_TIMER_HYP_PPI;
|
||||
|
||||
if (is_kernel_in_hyp_mode()) {
|
||||
arch_timer_uses_ppi = HYP_PPI;
|
||||
has_ppi = !!arch_timer_ppi[HYP_PPI];
|
||||
} else {
|
||||
arch_timer_uses_ppi = PHYS_SECURE_PPI;
|
||||
has_ppi = (!!arch_timer_ppi[PHYS_SECURE_PPI] ||
|
||||
!!arch_timer_ppi[PHYS_NONSECURE_PPI]);
|
||||
}
|
||||
if (!is_hyp_mode_available() && arch_timer_ppi[ARCH_TIMER_VIRT_PPI])
|
||||
return ARCH_TIMER_VIRT_PPI;
|
||||
|
||||
if (!has_ppi) {
|
||||
pr_warn("arch_timer: No interrupt available, giving up\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
if (IS_ENABLED(CONFIG_ARM64))
|
||||
return ARCH_TIMER_PHYS_NONSECURE_PPI;
|
||||
|
||||
ret = arch_timer_register();
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = arch_timer_common_init();
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[VIRT_PPI];
|
||||
|
||||
return 0;
|
||||
return ARCH_TIMER_PHYS_SECURE_PPI;
|
||||
}
|
||||
|
||||
static int __init arch_timer_of_init(struct device_node *np)
|
||||
{
|
||||
int i;
|
||||
int i, ret;
|
||||
u32 rate;
|
||||
|
||||
if (arch_timers_present & ARCH_CP15_TIMER) {
|
||||
pr_warn("arch_timer: multiple nodes in dt, skipping\n");
|
||||
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
|
||||
pr_warn("multiple nodes in dt, skipping\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_timers_present |= ARCH_CP15_TIMER;
|
||||
for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++)
|
||||
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
|
||||
for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++)
|
||||
arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
|
||||
|
||||
arch_timer_detect_rate(NULL, np);
|
||||
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
|
||||
|
||||
rate = arch_timer_get_cntfrq();
|
||||
arch_timer_of_configure_rate(rate, np);
|
||||
|
||||
arch_timer_c3stop = !of_property_read_bool(np, "always-on");
|
||||
|
||||
|
|
@ -1192,29 +1172,63 @@ static int __init arch_timer_of_init(struct device_node *np)
|
|||
*/
|
||||
if (IS_ENABLED(CONFIG_ARM) &&
|
||||
of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
|
||||
arch_timer_uses_ppi = PHYS_SECURE_PPI;
|
||||
arch_timer_uses_ppi = ARCH_TIMER_PHYS_SECURE_PPI;
|
||||
else
|
||||
arch_timer_uses_ppi = arch_timer_select_ppi();
|
||||
|
||||
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
|
||||
pr_err("No interrupt available, giving up\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* On some systems, the counter stops ticking when in suspend. */
|
||||
arch_counter_suspend_stop = of_property_read_bool(np,
|
||||
"arm,no-tick-in-suspend");
|
||||
|
||||
return arch_timer_init();
|
||||
ret = arch_timer_register();
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (arch_timer_needs_of_probing())
|
||||
return 0;
|
||||
|
||||
return arch_timer_common_init();
|
||||
}
|
||||
CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
|
||||
CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
|
||||
|
||||
static int __init arch_timer_mem_init(struct device_node *np)
|
||||
static u32 __init
|
||||
arch_timer_mem_frame_get_cntfrq(struct arch_timer_mem_frame *frame)
|
||||
{
|
||||
struct device_node *frame, *best_frame = NULL;
|
||||
void __iomem *cntctlbase, *base;
|
||||
unsigned int irq, ret = -EINVAL;
|
||||
u32 cnttidr;
|
||||
void __iomem *base;
|
||||
u32 rate;
|
||||
|
||||
arch_timers_present |= ARCH_MEM_TIMER;
|
||||
cntctlbase = of_iomap(np, 0);
|
||||
base = ioremap(frame->cntbase, frame->size);
|
||||
if (!base) {
|
||||
pr_err("Unable to map frame @ %pa\n", &frame->cntbase);
|
||||
return 0;
|
||||
}
|
||||
|
||||
rate = readl_relaxed(frame + CNTFRQ);
|
||||
|
||||
iounmap(frame);
|
||||
|
||||
return rate;
|
||||
}
|
||||
|
||||
static struct arch_timer_mem_frame * __init
|
||||
arch_timer_mem_find_best_frame(struct arch_timer_mem *timer_mem)
|
||||
{
|
||||
struct arch_timer_mem_frame *frame, *best_frame = NULL;
|
||||
void __iomem *cntctlbase;
|
||||
u32 cnttidr;
|
||||
int i;
|
||||
|
||||
cntctlbase = ioremap(timer_mem->cntctlbase, timer_mem->size);
|
||||
if (!cntctlbase) {
|
||||
pr_err("arch_timer: Can't find CNTCTLBase\n");
|
||||
return -ENXIO;
|
||||
pr_err("Can't map CNTCTLBase @ %pa\n",
|
||||
&timer_mem->cntctlbase);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
cnttidr = readl_relaxed(cntctlbase + CNTTIDR);
|
||||
|
|
@ -1223,25 +1237,20 @@ static int __init arch_timer_mem_init(struct device_node *np)
|
|||
* Try to find a virtual capable frame. Otherwise fall back to a
|
||||
* physical capable frame.
|
||||
*/
|
||||
for_each_available_child_of_node(np, frame) {
|
||||
int n;
|
||||
u32 cntacr;
|
||||
for (i = 0; i < ARCH_TIMER_MEM_MAX_FRAMES; i++) {
|
||||
u32 cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
|
||||
CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
|
||||
|
||||
if (of_property_read_u32(frame, "frame-number", &n)) {
|
||||
pr_err("arch_timer: Missing frame-number\n");
|
||||
of_node_put(frame);
|
||||
goto out;
|
||||
}
|
||||
frame = &timer_mem->frame[i];
|
||||
if (!frame->valid)
|
||||
continue;
|
||||
|
||||
/* Try enabling everything, and see what sticks */
|
||||
cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT |
|
||||
CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT;
|
||||
writel_relaxed(cntacr, cntctlbase + CNTACR(n));
|
||||
cntacr = readl_relaxed(cntctlbase + CNTACR(n));
|
||||
writel_relaxed(cntacr, cntctlbase + CNTACR(i));
|
||||
cntacr = readl_relaxed(cntctlbase + CNTACR(i));
|
||||
|
||||
if ((cnttidr & CNTTIDR_VIRT(n)) &&
|
||||
if ((cnttidr & CNTTIDR_VIRT(i)) &&
|
||||
!(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) {
|
||||
of_node_put(best_frame);
|
||||
best_frame = frame;
|
||||
arch_timer_mem_use_virtual = true;
|
||||
break;
|
||||
|
|
@ -1250,102 +1259,262 @@ static int __init arch_timer_mem_init(struct device_node *np)
|
|||
if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT))
|
||||
continue;
|
||||
|
||||
of_node_put(best_frame);
|
||||
best_frame = of_node_get(frame);
|
||||
best_frame = frame;
|
||||
}
|
||||
|
||||
ret= -ENXIO;
|
||||
base = arch_counter_base = of_io_request_and_map(best_frame, 0,
|
||||
"arch_mem_timer");
|
||||
if (IS_ERR(base)) {
|
||||
pr_err("arch_timer: Can't map frame's registers\n");
|
||||
goto out;
|
||||
}
|
||||
iounmap(cntctlbase);
|
||||
|
||||
if (!best_frame)
|
||||
pr_err("Unable to find a suitable frame in timer @ %pa\n",
|
||||
&timer_mem->cntctlbase);
|
||||
|
||||
return frame;
|
||||
}
|
||||
|
||||
static int __init
|
||||
arch_timer_mem_frame_register(struct arch_timer_mem_frame *frame)
|
||||
{
|
||||
void __iomem *base;
|
||||
int ret, irq = 0;
|
||||
|
||||
if (arch_timer_mem_use_virtual)
|
||||
irq = irq_of_parse_and_map(best_frame, 1);
|
||||
irq = frame->virt_irq;
|
||||
else
|
||||
irq = irq_of_parse_and_map(best_frame, 0);
|
||||
irq = frame->phys_irq;
|
||||
|
||||
ret = -EINVAL;
|
||||
if (!irq) {
|
||||
pr_err("arch_timer: Frame missing %s irq\n",
|
||||
pr_err("Frame missing %s irq.\n",
|
||||
arch_timer_mem_use_virtual ? "virt" : "phys");
|
||||
goto out;
|
||||
}
|
||||
|
||||
arch_timer_detect_rate(base, np);
|
||||
ret = arch_timer_mem_register(base, irq);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
return arch_timer_common_init();
|
||||
out:
|
||||
iounmap(cntctlbase);
|
||||
of_node_put(best_frame);
|
||||
return ret;
|
||||
}
|
||||
CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
|
||||
arch_timer_mem_init);
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags)
|
||||
{
|
||||
int trigger, polarity;
|
||||
|
||||
if (!interrupt)
|
||||
return 0;
|
||||
|
||||
trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
|
||||
: ACPI_LEVEL_SENSITIVE;
|
||||
|
||||
polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
|
||||
: ACPI_ACTIVE_HIGH;
|
||||
|
||||
return acpi_register_gsi(NULL, interrupt, trigger, polarity);
|
||||
}
|
||||
|
||||
/* Initialize per-processor generic timer */
|
||||
static int __init arch_timer_acpi_init(struct acpi_table_header *table)
|
||||
{
|
||||
struct acpi_table_gtdt *gtdt;
|
||||
|
||||
if (arch_timers_present & ARCH_CP15_TIMER) {
|
||||
pr_warn("arch_timer: already initialized, skipping\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
gtdt = container_of(table, struct acpi_table_gtdt, header);
|
||||
if (!request_mem_region(frame->cntbase, frame->size,
|
||||
"arch_mem_timer"))
|
||||
return -EBUSY;
|
||||
|
||||
arch_timers_present |= ARCH_CP15_TIMER;
|
||||
base = ioremap(frame->cntbase, frame->size);
|
||||
if (!base) {
|
||||
pr_err("Can't map frame's registers\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
arch_timer_ppi[PHYS_SECURE_PPI] =
|
||||
map_generic_timer_interrupt(gtdt->secure_el1_interrupt,
|
||||
gtdt->secure_el1_flags);
|
||||
ret = arch_timer_mem_register(base, irq);
|
||||
if (ret) {
|
||||
iounmap(base);
|
||||
return ret;
|
||||
}
|
||||
|
||||
arch_timer_ppi[PHYS_NONSECURE_PPI] =
|
||||
map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt,
|
||||
gtdt->non_secure_el1_flags);
|
||||
arch_counter_base = base;
|
||||
arch_timers_present |= ARCH_TIMER_TYPE_MEM;
|
||||
|
||||
arch_timer_ppi[VIRT_PPI] =
|
||||
map_generic_timer_interrupt(gtdt->virtual_timer_interrupt,
|
||||
gtdt->virtual_timer_flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_timer_ppi[HYP_PPI] =
|
||||
map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt,
|
||||
gtdt->non_secure_el2_flags);
|
||||
static int __init arch_timer_mem_of_init(struct device_node *np)
|
||||
{
|
||||
struct arch_timer_mem *timer_mem;
|
||||
struct arch_timer_mem_frame *frame;
|
||||
struct device_node *frame_node;
|
||||
struct resource res;
|
||||
int ret = -EINVAL;
|
||||
u32 rate;
|
||||
|
||||
/* Get the frequency from CNTFRQ */
|
||||
arch_timer_detect_rate(NULL, NULL);
|
||||
timer_mem = kzalloc(sizeof(*timer_mem), GFP_KERNEL);
|
||||
if (!timer_mem)
|
||||
return -ENOMEM;
|
||||
|
||||
if (of_address_to_resource(np, 0, &res))
|
||||
goto out;
|
||||
timer_mem->cntctlbase = res.start;
|
||||
timer_mem->size = resource_size(&res);
|
||||
|
||||
for_each_available_child_of_node(np, frame_node) {
|
||||
u32 n;
|
||||
struct arch_timer_mem_frame *frame;
|
||||
|
||||
if (of_property_read_u32(frame_node, "frame-number", &n)) {
|
||||
pr_err(FW_BUG "Missing frame-number.\n");
|
||||
of_node_put(frame_node);
|
||||
goto out;
|
||||
}
|
||||
if (n >= ARCH_TIMER_MEM_MAX_FRAMES) {
|
||||
pr_err(FW_BUG "Wrong frame-number, only 0-%u are permitted.\n",
|
||||
ARCH_TIMER_MEM_MAX_FRAMES - 1);
|
||||
of_node_put(frame_node);
|
||||
goto out;
|
||||
}
|
||||
frame = &timer_mem->frame[n];
|
||||
|
||||
if (frame->valid) {
|
||||
pr_err(FW_BUG "Duplicated frame-number.\n");
|
||||
of_node_put(frame_node);
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (of_address_to_resource(frame_node, 0, &res)) {
|
||||
of_node_put(frame_node);
|
||||
goto out;
|
||||
}
|
||||
frame->cntbase = res.start;
|
||||
frame->size = resource_size(&res);
|
||||
|
||||
frame->virt_irq = irq_of_parse_and_map(frame_node,
|
||||
ARCH_TIMER_VIRT_SPI);
|
||||
frame->phys_irq = irq_of_parse_and_map(frame_node,
|
||||
ARCH_TIMER_PHYS_SPI);
|
||||
|
||||
frame->valid = true;
|
||||
}
|
||||
|
||||
frame = arch_timer_mem_find_best_frame(timer_mem);
|
||||
if (!frame) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
rate = arch_timer_mem_frame_get_cntfrq(frame);
|
||||
arch_timer_of_configure_rate(rate, np);
|
||||
|
||||
ret = arch_timer_mem_frame_register(frame);
|
||||
if (!ret && !arch_timer_needs_of_probing())
|
||||
ret = arch_timer_common_init();
|
||||
out:
|
||||
kfree(timer_mem);
|
||||
return ret;
|
||||
}
|
||||
CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
|
||||
arch_timer_mem_of_init);
|
||||
|
||||
#ifdef CONFIG_ACPI_GTDT
|
||||
static int __init
|
||||
arch_timer_mem_verify_cntfrq(struct arch_timer_mem *timer_mem)
|
||||
{
|
||||
struct arch_timer_mem_frame *frame;
|
||||
u32 rate;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARCH_TIMER_MEM_MAX_FRAMES; i++) {
|
||||
frame = &timer_mem->frame[i];
|
||||
|
||||
if (!frame->valid)
|
||||
continue;
|
||||
|
||||
rate = arch_timer_mem_frame_get_cntfrq(frame);
|
||||
if (rate == arch_timer_rate)
|
||||
continue;
|
||||
|
||||
pr_err(FW_BUG "CNTFRQ mismatch: frame @ %pa: (0x%08lx), CPU: (0x%08lx)\n",
|
||||
&frame->cntbase,
|
||||
(unsigned long)rate, (unsigned long)arch_timer_rate);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init arch_timer_mem_acpi_init(int platform_timer_count)
|
||||
{
|
||||
struct arch_timer_mem *timers, *timer;
|
||||
struct arch_timer_mem_frame *frame;
|
||||
int timer_count, i, ret = 0;
|
||||
|
||||
timers = kcalloc(platform_timer_count, sizeof(*timers),
|
||||
GFP_KERNEL);
|
||||
if (!timers)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = acpi_arch_timer_mem_init(timers, &timer_count);
|
||||
if (ret || !timer_count)
|
||||
goto out;
|
||||
|
||||
for (i = 0; i < timer_count; i++) {
|
||||
ret = arch_timer_mem_verify_cntfrq(&timers[i]);
|
||||
if (ret) {
|
||||
pr_err("Disabling MMIO timers due to CNTFRQ mismatch\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* While unlikely, it's theoretically possible that none of the frames
|
||||
* in a timer expose the combination of feature we want.
|
||||
*/
|
||||
for (i = i; i < timer_count; i++) {
|
||||
timer = &timers[i];
|
||||
|
||||
frame = arch_timer_mem_find_best_frame(timer);
|
||||
if (frame)
|
||||
break;
|
||||
}
|
||||
|
||||
if (frame)
|
||||
ret = arch_timer_mem_frame_register(frame);
|
||||
out:
|
||||
kfree(timers);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Initialize per-processor generic timer and memory-mapped timer(if present) */
|
||||
static int __init arch_timer_acpi_init(struct acpi_table_header *table)
|
||||
{
|
||||
int ret, platform_timer_count;
|
||||
|
||||
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) {
|
||||
pr_warn("already initialized, skipping\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
|
||||
|
||||
ret = acpi_gtdt_init(table, &platform_timer_count);
|
||||
if (ret) {
|
||||
pr_err("Failed to init GTDT table.\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] =
|
||||
acpi_gtdt_map_ppi(ARCH_TIMER_PHYS_NONSECURE_PPI);
|
||||
|
||||
arch_timer_ppi[ARCH_TIMER_VIRT_PPI] =
|
||||
acpi_gtdt_map_ppi(ARCH_TIMER_VIRT_PPI);
|
||||
|
||||
arch_timer_ppi[ARCH_TIMER_HYP_PPI] =
|
||||
acpi_gtdt_map_ppi(ARCH_TIMER_HYP_PPI);
|
||||
|
||||
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
|
||||
|
||||
/*
|
||||
* When probing via ACPI, we have no mechanism to override the sysreg
|
||||
* CNTFRQ value. This *must* be correct.
|
||||
*/
|
||||
arch_timer_rate = arch_timer_get_cntfrq();
|
||||
if (!arch_timer_rate) {
|
||||
pr_err(FW_BUG "frequency not available.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
arch_timer_uses_ppi = arch_timer_select_ppi();
|
||||
if (!arch_timer_ppi[arch_timer_uses_ppi]) {
|
||||
pr_err("No interrupt available, giving up\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Always-on capability */
|
||||
arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
|
||||
arch_timer_c3stop = acpi_gtdt_c3stop(arch_timer_uses_ppi);
|
||||
|
||||
/* Check for globally applicable workarounds */
|
||||
arch_timer_check_ool_workaround(ate_match_acpi_oem_info, table);
|
||||
|
||||
arch_timer_init();
|
||||
return 0;
|
||||
ret = arch_timer_register();
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (platform_timer_count &&
|
||||
arch_timer_mem_acpi_init(platform_timer_count))
|
||||
pr_err("Failed to initialize memory-mapped timer.\n");
|
||||
|
||||
return arch_timer_common_init();
|
||||
}
|
||||
CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -16,9 +16,13 @@
|
|||
#ifndef __CLKSOURCE_ARM_ARCH_TIMER_H
|
||||
#define __CLKSOURCE_ARM_ARCH_TIMER_H
|
||||
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/timecounter.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#define ARCH_TIMER_TYPE_CP15 BIT(0)
|
||||
#define ARCH_TIMER_TYPE_MEM BIT(1)
|
||||
|
||||
#define ARCH_TIMER_CTRL_ENABLE (1 << 0)
|
||||
#define ARCH_TIMER_CTRL_IT_MASK (1 << 1)
|
||||
#define ARCH_TIMER_CTRL_IT_STAT (1 << 2)
|
||||
|
|
@ -34,11 +38,27 @@ enum arch_timer_reg {
|
|||
ARCH_TIMER_REG_TVAL,
|
||||
};
|
||||
|
||||
enum arch_timer_ppi_nr {
|
||||
ARCH_TIMER_PHYS_SECURE_PPI,
|
||||
ARCH_TIMER_PHYS_NONSECURE_PPI,
|
||||
ARCH_TIMER_VIRT_PPI,
|
||||
ARCH_TIMER_HYP_PPI,
|
||||
ARCH_TIMER_MAX_TIMER_PPI
|
||||
};
|
||||
|
||||
enum arch_timer_spi_nr {
|
||||
ARCH_TIMER_PHYS_SPI,
|
||||
ARCH_TIMER_VIRT_SPI,
|
||||
ARCH_TIMER_MAX_TIMER_SPI
|
||||
};
|
||||
|
||||
#define ARCH_TIMER_PHYS_ACCESS 0
|
||||
#define ARCH_TIMER_VIRT_ACCESS 1
|
||||
#define ARCH_TIMER_MEM_PHYS_ACCESS 2
|
||||
#define ARCH_TIMER_MEM_VIRT_ACCESS 3
|
||||
|
||||
#define ARCH_TIMER_MEM_MAX_FRAMES 8
|
||||
|
||||
#define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */
|
||||
#define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */
|
||||
#define ARCH_TIMER_VIRT_EVT_EN (1 << 2)
|
||||
|
|
@ -54,6 +74,20 @@ struct arch_timer_kvm_info {
|
|||
int virtual_irq;
|
||||
};
|
||||
|
||||
struct arch_timer_mem_frame {
|
||||
bool valid;
|
||||
phys_addr_t cntbase;
|
||||
size_t size;
|
||||
int phys_irq;
|
||||
int virt_irq;
|
||||
};
|
||||
|
||||
struct arch_timer_mem {
|
||||
phys_addr_t cntctlbase;
|
||||
size_t size;
|
||||
struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
|
||||
};
|
||||
|
||||
#ifdef CONFIG_ARM_ARCH_TIMER
|
||||
|
||||
extern u32 arch_timer_get_rate(void);
|
||||
|
|
|
|||
|
|
@ -595,6 +595,13 @@ enum acpi_reconfig_event {
|
|||
int acpi_reconfig_notifier_register(struct notifier_block *nb);
|
||||
int acpi_reconfig_notifier_unregister(struct notifier_block *nb);
|
||||
|
||||
#ifdef CONFIG_ACPI_GTDT
|
||||
int acpi_gtdt_init(struct acpi_table_header *table, int *platform_timer_count);
|
||||
int acpi_gtdt_map_ppi(int type);
|
||||
bool acpi_gtdt_c3stop(int type);
|
||||
int acpi_arch_timer_mem_init(struct arch_timer_mem *timer_mem, int *timer_count);
|
||||
#endif
|
||||
|
||||
#else /* !CONFIG_ACPI */
|
||||
|
||||
#define acpi_disabled 1
|
||||
|
|
|
|||
Loading…
Reference in New Issue