mmc: Remove msm_sdcc driver
This driver is orphaned now that mach-msm has been removed. Delete it. Cc: Chris Ball <chris@printf.net> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
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@ -393,14 +393,6 @@ config MMC_SDHCI_MSM
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If unsure, say N.
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config MMC_MSM
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tristate "Qualcomm SDCC Controller Support"
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depends on MMC && (ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50)
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help
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This provides support for the SD/MMC cell found in the
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MSM and QSD SOCs from Qualcomm. The controller also has
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support for SDIO devices.
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config MMC_MXC
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tristate "Freescale i.MX21/27/31 or MPC512x Multimedia Card support"
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depends on ARCH_MXC || PPC_MPC512x
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@ -24,7 +24,6 @@ obj-$(CONFIG_MMC_OMAP) += omap.o
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obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o
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obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
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obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
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obj-$(CONFIG_MMC_MSM) += msm_sdcc.o
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obj-$(CONFIG_MMC_MVSDIO) += mvsdio.o
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obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o
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obj-$(CONFIG_MMC_GOLDFISH) += android-goldfish.o
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File diff suppressed because it is too large
Load diff
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@ -1,256 +0,0 @@
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/*
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* linux/drivers/mmc/host/msmsdcc.h - QCT MSM7K SDC Controller
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*
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* Copyright (C) 2008 Google, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* - Based on mmci.h
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*/
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#ifndef _MSM_SDCC_H
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#define _MSM_SDCC_H
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#define MSMSDCC_CRCI_SDC1 6
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#define MSMSDCC_CRCI_SDC2 7
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#define MSMSDCC_CRCI_SDC3 12
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#define MSMSDCC_CRCI_SDC4 13
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#define MMCIPOWER 0x000
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#define MCI_PWR_OFF 0x00
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#define MCI_PWR_UP 0x02
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#define MCI_PWR_ON 0x03
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#define MCI_OD (1 << 6)
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#define MMCICLOCK 0x004
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#define MCI_CLK_ENABLE (1 << 8)
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#define MCI_CLK_PWRSAVE (1 << 9)
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#define MCI_CLK_WIDEBUS (1 << 10)
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#define MCI_CLK_FLOWENA (1 << 12)
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#define MCI_CLK_INVERTOUT (1 << 13)
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#define MCI_CLK_SELECTIN (1 << 14)
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#define MMCIARGUMENT 0x008
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#define MMCICOMMAND 0x00c
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#define MCI_CPSM_RESPONSE (1 << 6)
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#define MCI_CPSM_LONGRSP (1 << 7)
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#define MCI_CPSM_INTERRUPT (1 << 8)
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#define MCI_CPSM_PENDING (1 << 9)
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#define MCI_CPSM_ENABLE (1 << 10)
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#define MCI_CPSM_PROGENA (1 << 11)
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#define MCI_CSPM_DATCMD (1 << 12)
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#define MCI_CSPM_MCIABORT (1 << 13)
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#define MCI_CSPM_CCSENABLE (1 << 14)
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#define MCI_CSPM_CCSDISABLE (1 << 15)
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#define MMCIRESPCMD 0x010
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#define MMCIRESPONSE0 0x014
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#define MMCIRESPONSE1 0x018
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#define MMCIRESPONSE2 0x01c
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#define MMCIRESPONSE3 0x020
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#define MMCIDATATIMER 0x024
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#define MMCIDATALENGTH 0x028
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#define MMCIDATACTRL 0x02c
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#define MCI_DPSM_ENABLE (1 << 0)
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#define MCI_DPSM_DIRECTION (1 << 1)
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#define MCI_DPSM_MODE (1 << 2)
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#define MCI_DPSM_DMAENABLE (1 << 3)
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#define MMCIDATACNT 0x030
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#define MMCISTATUS 0x034
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#define MCI_CMDCRCFAIL (1 << 0)
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#define MCI_DATACRCFAIL (1 << 1)
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#define MCI_CMDTIMEOUT (1 << 2)
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#define MCI_DATATIMEOUT (1 << 3)
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#define MCI_TXUNDERRUN (1 << 4)
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#define MCI_RXOVERRUN (1 << 5)
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#define MCI_CMDRESPEND (1 << 6)
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#define MCI_CMDSENT (1 << 7)
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#define MCI_DATAEND (1 << 8)
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#define MCI_DATABLOCKEND (1 << 10)
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#define MCI_CMDACTIVE (1 << 11)
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#define MCI_TXACTIVE (1 << 12)
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#define MCI_RXACTIVE (1 << 13)
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#define MCI_TXFIFOHALFEMPTY (1 << 14)
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#define MCI_RXFIFOHALFFULL (1 << 15)
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#define MCI_TXFIFOFULL (1 << 16)
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#define MCI_RXFIFOFULL (1 << 17)
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#define MCI_TXFIFOEMPTY (1 << 18)
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#define MCI_RXFIFOEMPTY (1 << 19)
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#define MCI_TXDATAAVLBL (1 << 20)
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#define MCI_RXDATAAVLBL (1 << 21)
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#define MCI_SDIOINTR (1 << 22)
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#define MCI_PROGDONE (1 << 23)
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#define MCI_ATACMDCOMPL (1 << 24)
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#define MCI_SDIOINTOPER (1 << 25)
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#define MCI_CCSTIMEOUT (1 << 26)
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#define MMCICLEAR 0x038
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#define MCI_CMDCRCFAILCLR (1 << 0)
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#define MCI_DATACRCFAILCLR (1 << 1)
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#define MCI_CMDTIMEOUTCLR (1 << 2)
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#define MCI_DATATIMEOUTCLR (1 << 3)
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#define MCI_TXUNDERRUNCLR (1 << 4)
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#define MCI_RXOVERRUNCLR (1 << 5)
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#define MCI_CMDRESPENDCLR (1 << 6)
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#define MCI_CMDSENTCLR (1 << 7)
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#define MCI_DATAENDCLR (1 << 8)
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#define MCI_DATABLOCKENDCLR (1 << 10)
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#define MMCIMASK0 0x03c
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#define MCI_CMDCRCFAILMASK (1 << 0)
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#define MCI_DATACRCFAILMASK (1 << 1)
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#define MCI_CMDTIMEOUTMASK (1 << 2)
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#define MCI_DATATIMEOUTMASK (1 << 3)
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#define MCI_TXUNDERRUNMASK (1 << 4)
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#define MCI_RXOVERRUNMASK (1 << 5)
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#define MCI_CMDRESPENDMASK (1 << 6)
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#define MCI_CMDSENTMASK (1 << 7)
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#define MCI_DATAENDMASK (1 << 8)
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#define MCI_DATABLOCKENDMASK (1 << 10)
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#define MCI_CMDACTIVEMASK (1 << 11)
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#define MCI_TXACTIVEMASK (1 << 12)
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#define MCI_RXACTIVEMASK (1 << 13)
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#define MCI_TXFIFOHALFEMPTYMASK (1 << 14)
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#define MCI_RXFIFOHALFFULLMASK (1 << 15)
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#define MCI_TXFIFOFULLMASK (1 << 16)
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#define MCI_RXFIFOFULLMASK (1 << 17)
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#define MCI_TXFIFOEMPTYMASK (1 << 18)
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#define MCI_RXFIFOEMPTYMASK (1 << 19)
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#define MCI_TXDATAAVLBLMASK (1 << 20)
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#define MCI_RXDATAAVLBLMASK (1 << 21)
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#define MCI_SDIOINTMASK (1 << 22)
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#define MCI_PROGDONEMASK (1 << 23)
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#define MCI_ATACMDCOMPLMASK (1 << 24)
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#define MCI_SDIOINTOPERMASK (1 << 25)
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#define MCI_CCSTIMEOUTMASK (1 << 26)
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#define MMCIMASK1 0x040
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#define MMCIFIFOCNT 0x044
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#define MCICCSTIMER 0x058
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#define MMCIFIFO 0x080 /* to 0x0bc */
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#define MCI_IRQENABLE \
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(MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \
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MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \
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MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATAENDMASK|MCI_PROGDONEMASK)
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#define MCI_IRQ_PIO \
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(MCI_RXDATAAVLBLMASK | MCI_TXDATAAVLBLMASK | MCI_RXFIFOEMPTYMASK | \
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MCI_TXFIFOEMPTYMASK | MCI_RXFIFOFULLMASK | MCI_TXFIFOFULLMASK | \
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MCI_RXFIFOHALFFULLMASK | MCI_TXFIFOHALFEMPTYMASK | \
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MCI_RXACTIVEMASK | MCI_TXACTIVEMASK)
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/*
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* The size of the FIFO in bytes.
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*/
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#define MCI_FIFOSIZE (16*4)
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#define MCI_FIFOHALFSIZE (MCI_FIFOSIZE / 2)
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#define NR_SG 32
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struct clk;
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struct msmsdcc_nc_dmadata {
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dmov_box cmd[NR_SG];
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uint32_t cmdptr;
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};
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struct msmsdcc_dma_data {
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struct msmsdcc_nc_dmadata *nc;
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dma_addr_t nc_busaddr;
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dma_addr_t cmd_busaddr;
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dma_addr_t cmdptr_busaddr;
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struct msm_dmov_cmd hdr;
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enum dma_data_direction dir;
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struct scatterlist *sg;
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int num_ents;
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int channel;
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struct msmsdcc_host *host;
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int busy; /* Set if DM is busy */
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int active;
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unsigned int result;
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struct msm_dmov_errdata err;
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};
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struct msmsdcc_pio_data {
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struct scatterlist *sg;
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unsigned int sg_len;
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unsigned int sg_off;
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};
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struct msmsdcc_curr_req {
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struct mmc_request *mrq;
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struct mmc_command *cmd;
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struct mmc_data *data;
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unsigned int xfer_size; /* Total data size */
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unsigned int xfer_remain; /* Bytes remaining to send */
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unsigned int data_xfered; /* Bytes acked by BLKEND irq */
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int got_dataend;
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int user_pages;
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};
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struct msmsdcc_stats {
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unsigned int reqs;
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unsigned int cmds;
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unsigned int cmdpoll_hits;
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unsigned int cmdpoll_misses;
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};
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struct msmsdcc_host {
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struct resource *cmd_irqres;
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struct resource *memres;
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struct resource *dmares;
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void __iomem *base;
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int pdev_id;
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unsigned int stat_irq;
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struct msmsdcc_curr_req curr;
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struct mmc_host *mmc;
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struct clk *clk; /* main MMC bus clock */
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struct clk *pclk; /* SDCC peripheral bus clock */
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unsigned int clks_on; /* set if clocks are enabled */
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struct timer_list busclk_timer;
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unsigned int eject; /* eject state */
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spinlock_t lock;
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unsigned int clk_rate; /* Current clock rate */
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unsigned int pclk_rate;
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u32 pwr;
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u32 saved_irq0mask; /* MMCIMASK0 reg value */
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struct msm_mmc_platform_data *plat;
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struct timer_list timer;
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unsigned int oldstat;
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struct msmsdcc_dma_data dma;
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struct msmsdcc_pio_data pio;
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int cmdpoll;
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struct msmsdcc_stats stats;
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struct tasklet_struct dma_tlet;
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/* Command parameters */
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unsigned int cmd_timeout;
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unsigned int cmd_pio_irqmask;
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unsigned int cmd_datactrl;
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struct mmc_command *cmd_cmd;
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u32 cmd_c;
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bool gpio_config_status;
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bool prog_scan;
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bool prog_enable;
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};
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#endif
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@ -1,27 +0,0 @@
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#ifndef __MMC_MSM_SDCC_H
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#define __MMC_MSM_SDCC_H
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#include <linux/mmc/host.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/sdio_func.h>
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struct msm_mmc_gpio {
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unsigned no;
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const char *name;
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};
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struct msm_mmc_gpio_data {
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struct msm_mmc_gpio *gpio;
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u8 size;
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};
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struct msm_mmc_platform_data {
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unsigned int ocr_mask; /* available voltages */
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u32 (*translate_vdd)(struct device *, unsigned int);
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unsigned int (*status)(struct device *);
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int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id);
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struct msm_mmc_gpio_data *gpio_data;
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void (*init_card)(struct mmc_card *card);
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};
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#endif
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