ARM: shmobile: Handle CA7 arch timer delay
Update the delay code to include arch timer checks for CA7. From a arch timer availability perspective CA7 should be treated same as CA15. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -45,6 +45,7 @@ void __init shmobile_init_delay(void)
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struct device_node *np, *cpus;
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bool is_a7_a8_a9 = false;
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bool is_a15 = false;
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bool has_arch_timer = false;
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u32 max_freq = 0;
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cpus = of_find_node_by_path("/cpus");
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@ -57,12 +58,16 @@ void __init shmobile_init_delay(void)
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if (!of_property_read_u32(np, "clock-frequency", &freq))
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max_freq = max(max_freq, freq);
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if (of_device_is_compatible(np, "arm,cortex-a7") ||
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of_device_is_compatible(np, "arm,cortex-a8") ||
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of_device_is_compatible(np, "arm,cortex-a9"))
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if (of_device_is_compatible(np, "arm,cortex-a8") ||
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of_device_is_compatible(np, "arm,cortex-a9")) {
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is_a7_a8_a9 = true;
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else if (of_device_is_compatible(np, "arm,cortex-a15"))
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} else if (of_device_is_compatible(np, "arm,cortex-a7")) {
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is_a7_a8_a9 = true;
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has_arch_timer = true;
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} else if (of_device_is_compatible(np, "arm,cortex-a15")) {
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is_a15 = true;
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has_arch_timer = true;
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}
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}
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of_node_put(cpus);
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@ -70,10 +75,12 @@ void __init shmobile_init_delay(void)
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if (!max_freq)
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return;
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if (is_a7_a8_a9)
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shmobile_setup_delay_hz(max_freq, 1, 3);
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else if (is_a15 && !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
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shmobile_setup_delay_hz(max_freq, 2, 4);
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if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
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if (is_a7_a8_a9)
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shmobile_setup_delay_hz(max_freq, 1, 3);
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else if (is_a15)
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shmobile_setup_delay_hz(max_freq, 2, 4);
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}
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}
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static void __init shmobile_late_time_init(void)
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