drm/i915: Pass intel_plane and intel_crtc to plane hooks
Streamline things by passing intel_plane and intel_crtc instead of the drm types to our plane hooks. v2: s/ilk/g4x/ in sprite code Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/20170327185546.2977-3-ville.syrjala@linux.intel.com
This commit is contained in:
parent
d509e28b70
commit
282dbf9b01
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@ -185,7 +185,7 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
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}
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intel_state->base.visible = false;
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ret = intel_plane->check_plane(plane, crtc_state, intel_state);
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ret = intel_plane->check_plane(intel_plane, crtc_state, intel_state);
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if (ret)
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return ret;
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@ -235,14 +235,14 @@ static void intel_plane_atomic_update(struct drm_plane *plane,
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trace_intel_update_plane(plane,
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to_intel_crtc(crtc));
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intel_plane->update_plane(plane,
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intel_plane->update_plane(intel_plane,
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to_intel_crtc_state(crtc->state),
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intel_state);
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} else {
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trace_intel_disable_plane(plane,
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to_intel_crtc(crtc));
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intel_plane->disable_plane(plane, crtc);
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intel_plane->disable_plane(intel_plane, to_intel_crtc(crtc));
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}
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}
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@ -2750,7 +2750,7 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
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false);
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intel_pre_disable_primary_noatomic(&intel_crtc->base);
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trace_intel_disable_plane(primary, intel_crtc);
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intel_plane->disable_plane(primary, &intel_crtc->base);
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intel_plane->disable_plane(intel_plane, intel_crtc);
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return;
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@ -3061,14 +3061,14 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
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return 0;
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}
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static void i9xx_update_primary_plane(struct drm_plane *primary,
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static void i9xx_update_primary_plane(struct intel_plane *primary,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct drm_i915_private *dev_priv = to_i915(primary->dev);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_framebuffer *fb = plane_state->base.fb;
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int plane = intel_crtc->plane;
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struct drm_i915_private *dev_priv = to_i915(primary->base.dev);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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const struct drm_framebuffer *fb = plane_state->base.fb;
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enum plane plane = primary->plane;
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u32 linear_offset;
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u32 dspcntr = plane_state->ctl;
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i915_reg_t reg = DSPCNTR(plane);
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@ -3079,12 +3079,12 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
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linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
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if (INTEL_GEN(dev_priv) >= 4)
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intel_crtc->dspaddr_offset = plane_state->main.offset;
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crtc->dspaddr_offset = plane_state->main.offset;
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else
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intel_crtc->dspaddr_offset = linear_offset;
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crtc->dspaddr_offset = linear_offset;
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intel_crtc->adjusted_x = x;
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intel_crtc->adjusted_y = y;
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crtc->adjusted_x = x;
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crtc->adjusted_y = y;
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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@ -3110,31 +3110,29 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
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if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
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I915_WRITE_FW(DSPSURF(plane),
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intel_plane_ggtt_offset(plane_state) +
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intel_crtc->dspaddr_offset);
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crtc->dspaddr_offset);
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I915_WRITE_FW(DSPOFFSET(plane), (y << 16) | x);
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} else if (INTEL_GEN(dev_priv) >= 4) {
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I915_WRITE_FW(DSPSURF(plane),
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intel_plane_ggtt_offset(plane_state) +
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intel_crtc->dspaddr_offset);
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crtc->dspaddr_offset);
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I915_WRITE_FW(DSPTILEOFF(plane), (y << 16) | x);
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I915_WRITE_FW(DSPLINOFF(plane), linear_offset);
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} else {
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I915_WRITE_FW(DSPADDR(plane),
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intel_plane_ggtt_offset(plane_state) +
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intel_crtc->dspaddr_offset);
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crtc->dspaddr_offset);
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}
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POSTING_READ_FW(reg);
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spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
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}
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static void i9xx_disable_primary_plane(struct drm_plane *primary,
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struct drm_crtc *crtc)
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static void i9xx_disable_primary_plane(struct intel_plane *primary,
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struct intel_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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int plane = intel_crtc->plane;
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struct drm_i915_private *dev_priv = to_i915(primary->base.dev);
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enum plane plane = primary->plane;
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unsigned long irqflags;
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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@ -3319,16 +3317,15 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
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return plane_ctl;
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}
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static void skylake_update_primary_plane(struct drm_plane *plane,
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static void skylake_update_primary_plane(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct drm_device *dev = plane->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_framebuffer *fb = plane_state->base.fb;
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enum plane_id plane_id = to_intel_plane(plane)->id;
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enum pipe pipe = to_intel_plane(plane)->pipe;
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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const struct drm_framebuffer *fb = plane_state->base.fb;
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enum plane_id plane_id = plane->id;
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enum pipe pipe = plane->pipe;
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u32 plane_ctl = plane_state->ctl;
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unsigned int rotation = plane_state->base.rotation;
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u32 stride = skl_plane_stride(fb, 0, rotation);
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@ -3350,10 +3347,10 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
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dst_w--;
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dst_h--;
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intel_crtc->dspaddr_offset = surf_addr;
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crtc->dspaddr_offset = surf_addr;
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intel_crtc->adjusted_x = src_x;
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intel_crtc->adjusted_y = src_y;
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crtc->adjusted_x = src_x;
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crtc->adjusted_y = src_y;
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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@ -3392,13 +3389,12 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
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spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
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}
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static void skylake_disable_primary_plane(struct drm_plane *primary,
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struct drm_crtc *crtc)
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static void skylake_disable_primary_plane(struct intel_plane *primary,
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struct intel_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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enum plane_id plane_id = to_intel_plane(primary)->id;
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enum pipe pipe = to_intel_plane(primary)->pipe;
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struct drm_i915_private *dev_priv = to_i915(primary->base.dev);
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enum plane_id plane_id = primary->id;
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enum pipe pipe = primary->pipe;
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unsigned long irqflags;
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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@ -3431,7 +3427,7 @@ static void intel_update_primary_planes(struct drm_device *dev)
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trace_intel_update_plane(&plane->base,
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to_intel_crtc(crtc));
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plane->update_plane(&plane->base,
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plane->update_plane(plane,
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to_intel_crtc_state(crtc->state),
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plane_state);
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}
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@ -5081,7 +5077,7 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc, unsigned plane_mask
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intel_crtc_dpms_overlay_disable(intel_crtc);
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drm_for_each_plane_mask(p, dev, plane_mask)
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to_intel_plane(p)->disable_plane(p, crtc);
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to_intel_plane(p)->disable_plane(to_intel_plane(p), intel_crtc);
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/*
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* FIXME: Once we grow proper nuclear flip support out of this we need
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@ -13279,11 +13275,11 @@ skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state
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}
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static int
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intel_check_primary_plane(struct drm_plane *plane,
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intel_check_primary_plane(struct intel_plane *plane,
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struct intel_crtc_state *crtc_state,
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struct intel_plane_state *state)
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{
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struct drm_i915_private *dev_priv = to_i915(plane->dev);
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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struct drm_crtc *crtc = state->base.crtc;
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int min_scale = DRM_PLANE_HELPER_NO_SCALING;
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int max_scale = DRM_PLANE_HELPER_NO_SCALING;
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@ -13498,12 +13494,12 @@ intel_legacy_cursor_update(struct drm_plane *plane,
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if (plane->state->visible) {
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trace_intel_update_plane(plane, to_intel_crtc(crtc));
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intel_plane->update_plane(plane,
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intel_plane->update_plane(intel_plane,
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to_intel_crtc_state(crtc->state),
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to_intel_plane_state(plane->state));
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} else {
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trace_intel_disable_plane(plane, to_intel_crtc(crtc));
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intel_plane->disable_plane(plane, crtc);
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intel_plane->disable_plane(intel_plane, to_intel_crtc(crtc));
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}
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intel_cleanup_plane_fb(plane, new_plane_state);
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@ -13647,14 +13643,14 @@ fail:
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}
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static int
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intel_check_cursor_plane(struct drm_plane *plane,
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intel_check_cursor_plane(struct intel_plane *plane,
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struct intel_crtc_state *crtc_state,
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struct intel_plane_state *state)
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{
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struct drm_i915_private *dev_priv = to_i915(plane->dev);
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struct drm_framebuffer *fb = state->base.fb;
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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const struct drm_framebuffer *fb = state->base.fb;
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struct drm_i915_gem_object *obj = intel_fb_obj(fb);
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enum pipe pipe = to_intel_plane(plane)->pipe;
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enum pipe pipe = plane->pipe;
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unsigned stride;
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int ret;
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@ -13714,23 +13710,20 @@ intel_check_cursor_plane(struct drm_plane *plane,
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}
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static void
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intel_disable_cursor_plane(struct drm_plane *plane,
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struct drm_crtc *crtc)
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intel_disable_cursor_plane(struct intel_plane *plane,
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struct intel_crtc *crtc)
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{
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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intel_crtc->cursor_addr = 0;
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intel_crtc_update_cursor(crtc, NULL);
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crtc->cursor_addr = 0;
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intel_crtc_update_cursor(&crtc->base, NULL);
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}
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static void
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intel_update_cursor_plane(struct drm_plane *plane,
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intel_update_cursor_plane(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *state)
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{
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struct drm_crtc *crtc = crtc_state->base.crtc;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct drm_i915_private *dev_priv = to_i915(plane->dev);
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_gem_object *obj = intel_fb_obj(state->base.fb);
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uint32_t addr;
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else
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addr = obj->phys_handle->busaddr;
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intel_crtc->cursor_addr = addr;
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intel_crtc_update_cursor(crtc, state);
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crtc->cursor_addr = addr;
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intel_crtc_update_cursor(&crtc->base, state);
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}
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static struct intel_plane *
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@ -15160,7 +15153,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc)
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continue;
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trace_intel_disable_plane(&plane->base, crtc);
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plane->disable_plane(&plane->base, &crtc->base);
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plane->disable_plane(plane, crtc);
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}
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}
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@ -851,12 +851,12 @@ struct intel_plane {
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* the intel_plane_state structure and accessed via plane_state.
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*/
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void (*update_plane)(struct drm_plane *plane,
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void (*update_plane)(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state);
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void (*disable_plane)(struct drm_plane *plane,
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struct drm_crtc *crtc);
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int (*check_plane)(struct drm_plane *plane,
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void (*disable_plane)(struct intel_plane *plane,
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struct intel_crtc *crtc);
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int (*check_plane)(struct intel_plane *plane,
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struct intel_crtc_state *crtc_state,
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struct intel_plane_state *state);
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};
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@ -207,16 +207,14 @@ void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work
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}
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static void
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skl_update_plane(struct drm_plane *drm_plane,
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skl_update_plane(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct drm_device *dev = drm_plane->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_plane *intel_plane = to_intel_plane(drm_plane);
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struct drm_framebuffer *fb = plane_state->base.fb;
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enum plane_id plane_id = intel_plane->id;
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enum pipe pipe = intel_plane->pipe;
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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const struct drm_framebuffer *fb = plane_state->base.fb;
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enum plane_id plane_id = plane->id;
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enum pipe pipe = plane->pipe;
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u32 plane_ctl = plane_state->ctl;
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const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
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u32 surf_addr = plane_state->main.offset;
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@ -285,13 +283,11 @@ skl_update_plane(struct drm_plane *drm_plane,
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}
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static void
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skl_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
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skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
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{
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struct drm_device *dev = dplane->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_plane *intel_plane = to_intel_plane(dplane);
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enum plane_id plane_id = intel_plane->id;
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enum pipe pipe = intel_plane->pipe;
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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enum plane_id plane_id = plane->id;
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enum pipe pipe = plane->pipe;
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unsigned long irqflags;
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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@ -305,10 +301,10 @@ skl_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
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}
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static void
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chv_update_csc(struct intel_plane *intel_plane, uint32_t format)
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chv_update_csc(struct intel_plane *plane, uint32_t format)
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{
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struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
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enum plane_id plane_id = intel_plane->id;
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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enum plane_id plane_id = plane->id;
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/* Seems RGB data bypasses the CSC always */
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if (!format_is_yuv(format))
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@ -408,16 +404,14 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
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}
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static void
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vlv_update_plane(struct drm_plane *dplane,
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vlv_update_plane(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct drm_device *dev = dplane->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct intel_plane *intel_plane = to_intel_plane(dplane);
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struct drm_framebuffer *fb = plane_state->base.fb;
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enum pipe pipe = intel_plane->pipe;
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enum plane_id plane_id = intel_plane->id;
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struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
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const struct drm_framebuffer *fb = plane_state->base.fb;
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enum pipe pipe = plane->pipe;
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enum plane_id plane_id = plane->id;
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u32 sprctl = plane_state->ctl;
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u32 sprsurf_offset = plane_state->main.offset;
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u32 linear_offset;
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@ -439,7 +433,7 @@ vlv_update_plane(struct drm_plane *dplane,
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spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
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if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B)
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chv_update_csc(intel_plane, fb->format->format);
|
||||
chv_update_csc(plane, fb->format->format);
|
||||
|
||||
if (key->flags) {
|
||||
I915_WRITE_FW(SPKEYMINVAL(pipe, plane_id), key->min_value);
|
||||
|
@ -466,13 +460,11 @@ vlv_update_plane(struct drm_plane *dplane,
|
|||
}
|
||||
|
||||
static void
|
||||
vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
|
||||
vlv_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
|
||||
{
|
||||
struct drm_device *dev = dplane->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct intel_plane *intel_plane = to_intel_plane(dplane);
|
||||
enum pipe pipe = intel_plane->pipe;
|
||||
enum plane_id plane_id = intel_plane->id;
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
|
||||
enum pipe pipe = plane->pipe;
|
||||
enum plane_id plane_id = plane->id;
|
||||
unsigned long irqflags;
|
||||
|
||||
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
|
||||
|
@ -542,15 +534,13 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
|
|||
}
|
||||
|
||||
static void
|
||||
ivb_update_plane(struct drm_plane *plane,
|
||||
ivb_update_plane(struct intel_plane *plane,
|
||||
const struct intel_crtc_state *crtc_state,
|
||||
const struct intel_plane_state *plane_state)
|
||||
{
|
||||
struct drm_device *dev = plane->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct intel_plane *intel_plane = to_intel_plane(plane);
|
||||
struct drm_framebuffer *fb = plane_state->base.fb;
|
||||
enum pipe pipe = intel_plane->pipe;
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
|
||||
const struct drm_framebuffer *fb = plane_state->base.fb;
|
||||
enum pipe pipe = plane->pipe;
|
||||
u32 sprctl = plane_state->ctl, sprscale = 0;
|
||||
u32 sprsurf_offset = plane_state->main.offset;
|
||||
u32 linear_offset;
|
||||
|
@ -597,7 +587,7 @@ ivb_update_plane(struct drm_plane *plane,
|
|||
I915_WRITE_FW(SPRLINOFF(pipe), linear_offset);
|
||||
|
||||
I915_WRITE_FW(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
|
||||
if (intel_plane->can_scale)
|
||||
if (plane->can_scale)
|
||||
I915_WRITE_FW(SPRSCALE(pipe), sprscale);
|
||||
I915_WRITE_FW(SPRCTL(pipe), sprctl);
|
||||
I915_WRITE_FW(SPRSURF(pipe),
|
||||
|
@ -608,19 +598,17 @@ ivb_update_plane(struct drm_plane *plane,
|
|||
}
|
||||
|
||||
static void
|
||||
ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
|
||||
ivb_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
|
||||
{
|
||||
struct drm_device *dev = plane->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct intel_plane *intel_plane = to_intel_plane(plane);
|
||||
int pipe = intel_plane->pipe;
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
|
||||
enum pipe pipe = plane->pipe;
|
||||
unsigned long irqflags;
|
||||
|
||||
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
|
||||
|
||||
I915_WRITE_FW(SPRCTL(pipe), 0);
|
||||
/* Can't leave the scaler enabled... */
|
||||
if (intel_plane->can_scale)
|
||||
if (plane->can_scale)
|
||||
I915_WRITE_FW(SPRSCALE(pipe), 0);
|
||||
|
||||
I915_WRITE_FW(SPRSURF(pipe), 0);
|
||||
|
@ -683,15 +671,13 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
|
|||
}
|
||||
|
||||
static void
|
||||
g4x_update_plane(struct drm_plane *plane,
|
||||
g4x_update_plane(struct intel_plane *plane,
|
||||
const struct intel_crtc_state *crtc_state,
|
||||
const struct intel_plane_state *plane_state)
|
||||
{
|
||||
struct drm_device *dev = plane->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct intel_plane *intel_plane = to_intel_plane(plane);
|
||||
struct drm_framebuffer *fb = plane_state->base.fb;
|
||||
int pipe = intel_plane->pipe;
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
|
||||
const struct drm_framebuffer *fb = plane_state->base.fb;
|
||||
enum pipe pipe = plane->pipe;
|
||||
u32 dvscntr = plane_state->ctl, dvsscale = 0;
|
||||
u32 dvssurf_offset = plane_state->main.offset;
|
||||
u32 linear_offset;
|
||||
|
@ -744,12 +730,10 @@ g4x_update_plane(struct drm_plane *plane,
|
|||
}
|
||||
|
||||
static void
|
||||
g4x_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
|
||||
g4x_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
|
||||
{
|
||||
struct drm_device *dev = plane->dev;
|
||||
struct drm_i915_private *dev_priv = to_i915(dev);
|
||||
struct intel_plane *intel_plane = to_intel_plane(plane);
|
||||
int pipe = intel_plane->pipe;
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
|
||||
enum pipe pipe = plane->pipe;
|
||||
unsigned long irqflags;
|
||||
|
||||
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
|
||||
|
@ -765,14 +749,12 @@ g4x_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
|
|||
}
|
||||
|
||||
static int
|
||||
intel_check_sprite_plane(struct drm_plane *plane,
|
||||
intel_check_sprite_plane(struct intel_plane *plane,
|
||||
struct intel_crtc_state *crtc_state,
|
||||
struct intel_plane_state *state)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->dev);
|
||||
struct drm_crtc *crtc = state->base.crtc;
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
struct intel_plane *intel_plane = to_intel_plane(plane);
|
||||
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
|
||||
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
|
||||
struct drm_framebuffer *fb = state->base.fb;
|
||||
int crtc_x, crtc_y;
|
||||
unsigned int crtc_w, crtc_h;
|
||||
|
@ -794,7 +776,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
|
|||
}
|
||||
|
||||
/* Don't modify another pipe's plane */
|
||||
if (intel_plane->pipe != intel_crtc->pipe) {
|
||||
if (plane->pipe != crtc->pipe) {
|
||||
DRM_DEBUG_KMS("Wrong plane <-> crtc mapping\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -811,16 +793,16 @@ intel_check_sprite_plane(struct drm_plane *plane,
|
|||
if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
|
||||
can_scale = 1;
|
||||
min_scale = 1;
|
||||
max_scale = skl_max_scale(intel_crtc, crtc_state);
|
||||
max_scale = skl_max_scale(crtc, crtc_state);
|
||||
} else {
|
||||
can_scale = 0;
|
||||
min_scale = DRM_PLANE_HELPER_NO_SCALING;
|
||||
max_scale = DRM_PLANE_HELPER_NO_SCALING;
|
||||
}
|
||||
} else {
|
||||
can_scale = intel_plane->can_scale;
|
||||
max_scale = intel_plane->max_downscale << 16;
|
||||
min_scale = intel_plane->can_scale ? 1 : (1 << 16);
|
||||
can_scale = plane->can_scale;
|
||||
max_scale = plane->max_downscale << 16;
|
||||
min_scale = plane->can_scale ? 1 : (1 << 16);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
Loading…
Reference in a new issue