sfc: Add option to use a separate channel for TX completions
In a bidirectional forwarding test, we find that the best performance is achieved by sending the TX completion interrupts from one NIC to a CPU which shares an L2 cache with RX completion interrupts from the other NIC. To facilitate this, add an option (through a module parameter) to create separate channels for RX and TX completion with separate IRQs when MSI-X is available. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -64,13 +64,15 @@ MODULE_PARM_DESC(lro, "Large receive offload acceleration");
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/*
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* Use separate channels for TX and RX events
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*
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* Set this to 1 to use separate channels for TX and RX. It allows us to
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* apply a higher level of interrupt moderation to TX events.
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* Set this to 1 to use separate channels for TX and RX. It allows us
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* to control interrupt affinity separately for TX and RX.
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*
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* This is forced to 0 for MSI interrupt mode as the interrupt vector
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* is not written
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* This is only used in MSI-X interrupt mode
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*/
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static unsigned int separate_tx_and_rx_channels = true;
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static unsigned int separate_tx_channels;
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module_param(separate_tx_channels, uint, 0644);
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MODULE_PARM_DESC(separate_tx_channels,
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"Use separate channels for TX and RX");
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/* This is the weight assigned to each of the (per-channel) virtual
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* NAPI devices.
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@ -846,26 +848,33 @@ static void efx_probe_interrupts(struct efx_nic *efx)
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if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
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struct msix_entry xentries[EFX_MAX_CHANNELS];
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int wanted_ints;
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int rx_queues;
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/* We want one RX queue and interrupt per CPU package
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* (or as specified by the rss_cpus module parameter).
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* We will need one channel per interrupt.
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*/
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wanted_ints = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
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efx->n_rx_queues = min(wanted_ints, max_channels);
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rx_queues = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
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wanted_ints = rx_queues + (separate_tx_channels ? 1 : 0);
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wanted_ints = min(wanted_ints, max_channels);
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for (i = 0; i < efx->n_rx_queues; i++)
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for (i = 0; i < wanted_ints; i++)
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xentries[i].entry = i;
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rc = pci_enable_msix(efx->pci_dev, xentries, efx->n_rx_queues);
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rc = pci_enable_msix(efx->pci_dev, xentries, wanted_ints);
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if (rc > 0) {
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EFX_BUG_ON_PARANOID(rc >= efx->n_rx_queues);
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efx->n_rx_queues = rc;
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EFX_ERR(efx, "WARNING: Insufficient MSI-X vectors"
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" available (%d < %d).\n", rc, wanted_ints);
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EFX_ERR(efx, "WARNING: Performance may be reduced.\n");
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EFX_BUG_ON_PARANOID(rc >= wanted_ints);
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wanted_ints = rc;
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rc = pci_enable_msix(efx->pci_dev, xentries,
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efx->n_rx_queues);
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wanted_ints);
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}
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if (rc == 0) {
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for (i = 0; i < efx->n_rx_queues; i++)
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efx->n_rx_queues = min(rx_queues, wanted_ints);
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efx->n_channels = wanted_ints;
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for (i = 0; i < wanted_ints; i++)
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efx->channel[i].irq = xentries[i].vector;
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} else {
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/* Fall back to single channel MSI */
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@ -877,6 +886,7 @@ static void efx_probe_interrupts(struct efx_nic *efx)
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/* Try single interrupt MSI */
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if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
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efx->n_rx_queues = 1;
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efx->n_channels = 1;
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rc = pci_enable_msi(efx->pci_dev);
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if (rc == 0) {
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efx->channel[0].irq = efx->pci_dev->irq;
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@ -889,6 +899,7 @@ static void efx_probe_interrupts(struct efx_nic *efx)
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/* Assume legacy interrupts */
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if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
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efx->n_rx_queues = 1;
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efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
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efx->legacy_irq = efx->pci_dev->irq;
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}
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}
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@ -913,8 +924,8 @@ static void efx_set_channels(struct efx_nic *efx)
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struct efx_rx_queue *rx_queue;
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efx_for_each_tx_queue(tx_queue, efx) {
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if (!EFX_INT_MODE_USE_MSI(efx) && separate_tx_and_rx_channels)
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tx_queue->channel = &efx->channel[1];
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if (separate_tx_channels)
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tx_queue->channel = &efx->channel[efx->n_channels-1];
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else
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tx_queue->channel = &efx->channel[0];
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tx_queue->channel->used_flags |= EFX_USED_BY_TX;
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@ -649,6 +649,7 @@ union efx_multicast_hash {
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* @rx_queue: RX DMA queues
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* @channel: Channels
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* @n_rx_queues: Number of RX queues
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* @n_channels: Number of channels in use
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* @rx_buffer_len: RX buffer length
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* @rx_buffer_order: Order (log2) of number of pages for each RX buffer
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* @irq_status: Interrupt status buffer
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@ -728,6 +729,7 @@ struct efx_nic {
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struct efx_channel channel[EFX_MAX_CHANNELS];
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int n_rx_queues;
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int n_channels;
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unsigned int rx_buffer_len;
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unsigned int rx_buffer_order;
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