ARM: realview: remove private barrier implementation

The realview barrier implementation tries to avoid calling outer_sync in order
to not lock up as a result of a bug in the l220 cache controller.

This gets in the way of the multiplatform support, but we can still remove
it if we make sure that the outer_sync function never gets called, by replacing
the function pointer with NULL, right after initialization.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[Fixed up header inclusions]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Arnd Bergmann 2015-11-25 17:32:18 +01:00 committed by Linus Walleij
parent 38541bf485
commit 2b749cb3a5
4 changed files with 13 additions and 10 deletions

View file

@ -36,7 +36,6 @@ config REALVIEW_EB_A9MP
config REALVIEW_EB_ARM11MP config REALVIEW_EB_ARM11MP
bool "Support ARM11MPCore Tile" bool "Support ARM11MPCore Tile"
depends on MACH_REALVIEW_EB depends on MACH_REALVIEW_EB
select ARCH_HAS_BARRIERS if SMP
select CPU_V6K select CPU_V6K
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP select HAVE_ARM_TWD if SMP
@ -57,7 +56,6 @@ config REALVIEW_EB_ARM11MP_REVB
config MACH_REALVIEW_PB11MP config MACH_REALVIEW_PB11MP
bool "Support RealView(R) Platform Baseboard for ARM11MPCore" bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
select ARCH_HAS_BARRIERS if SMP
select ARM_GIC select ARM_GIC
select CPU_V6K select CPU_V6K
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP

View file

@ -1,8 +0,0 @@
/*
* Barriers redefined for RealView ARM11MPCore platforms with L220 cache
* controller to work around hardware errata causing the outer_sync()
* operation to deadlock the system.
*/
#define mb() dsb()
#define rmb() dsb()
#define wmb() mb()

View file

@ -38,6 +38,7 @@
#include <asm/hardware/cache-l2x0.h> #include <asm/hardware/cache-l2x0.h>
#include <asm/smp_twd.h> #include <asm/smp_twd.h>
#include <asm/system_info.h> #include <asm/system_info.h>
#include <asm/outercache.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
@ -450,6 +451,12 @@ static void __init realview_eb_init(void)
* Bits: .... ...0 0111 1001 0000 .... .... .... * Bits: .... ...0 0111 1001 0000 .... .... ....
*/ */
l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff); l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
/*
* due to a bug in the l220 cache controller, we must not call
* the sync function. stub it out here instead!
*/
outer_cache.sync = NULL;
#endif #endif
pmu_device.name = core_tile_a9mp() ? "armv7-pmu" : "armv6-pmu"; pmu_device.name = core_tile_a9mp() ? "armv7-pmu" : "armv6-pmu";
platform_device_register(&pmu_device); platform_device_register(&pmu_device);

View file

@ -42,6 +42,7 @@
#include <asm/mach/flash.h> #include <asm/mach/flash.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <asm/mach/time.h> #include <asm/mach/time.h>
#include <asm/outercache.h>
#include <mach/board-pb11mp.h> #include <mach/board-pb11mp.h>
#include <mach/irqs.h> #include <mach/irqs.h>
@ -345,6 +346,11 @@ static void __init realview_pb11mp_init(void)
* Bits: .... ...0 0111 1001 0000 .... .... .... * Bits: .... ...0 0111 1001 0000 .... .... ....
*/ */
l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff); l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
/*
* due to a bug in the l220 cache controller, we must not call
* the sync function. stub it out here instead!
*/
outer_cache.sync = NULL;
#endif #endif
realview_flash_register(realview_pb11mp_flash_resource, realview_flash_register(realview_pb11mp_flash_resource,