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ARM: imx: Remove PU power operation for i.MX6QP 

The GPC power domain driver add GENPD_FLAG_RPM_ALWAYS_ON to
the i.MX6QP's PU power domain flag, that means it is always ON
for runtime PM but can be OFF during suspend, so no need to
explicitly power ON/OFF PU power for i.MX6QP during suspend/resume
to avoid below dump:

Unable to handle kernel NULL pointer dereference at virtual address 00000044
pgd = 20824a30
[00000044] *pgd=4e36d831
Internal error: Oops: 17 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 732 Comm: sh Tainted: G        W         5.3.0-rc3-next-20190809-01770-g0a0b3ec-dir3
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
PC is at regmap_update_bits_base+0x10/0x74
LR is at imx6_pm_domain_power_on+0xbc/0x1b4
pc : [<c070887c>]    lr : [<c05e18e4>]    psr: 600001d3
sp : e9339d68  ip : e9338000  fp : c1a24158
r10: c1308b08  r9 : 00000260  r8 : c1308b08
r7 : c1426120  r6 : c1426120  r5 : c1373580  r4 : 00000000
r3 : 00000001  r2 : 00000001  r1 : 00000260  r0 : 00000000
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment none
Control: 10c5387d  Table: 3949404a  DAC: 00000051
Process sh (pid: 732, stack limit = 0x8ba716d6)

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Anson Huang 2019-09-04 17:22:46 +08:00 committed by Dong Aisheng
parent 738569521c
commit 2baaa05720
1 changed files with 0 additions and 10 deletions
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10
arch/arm/mach-imx/gpc.c
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@ -53,10 +53,6 @@ static u32 gpc_mf_irqs[IMR_NUM];
static u32 gpc_mf_request_on[IMR_NUM];
static DEFINE_SPINLOCK(gpc_lock);
/* implemented in drivers/soc/imx/gpc.c */
extern void _imx6_pm_pu_power_off(void);
extern void _imx6_pm_pu_power_on(void);
void imx_gpc_add_m4_wake_up_irq(u32 hwirq, bool enable)
{
unsigned int idx = hwirq / 32;
@ -199,9 +195,6 @@ void imx_gpc_pre_suspend(bool arm_power_off)
void __iomem *reg_imr1 = gpc_base + GPC_IMR1;
int i;
if (cpu_is_imx6q() && imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0)
_imx6_pm_pu_power_off();
/* power down the mega-fast power domain */
if ((cpu_is_imx6sx() || cpu_is_imx6ul() || cpu_is_imx6ull()
|| cpu_is_imx6sll()) && arm_power_off)
@ -222,9 +215,6 @@ void imx_gpc_post_resume(void)
void __iomem *reg_imr1 = gpc_base + GPC_IMR1;
int i;
if (cpu_is_imx6q() && imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0)
_imx6_pm_pu_power_on();
/* Keep ARM core powered on for other low-power modes */
imx_gpc_set_arm_power_in_lpm(false);
/* Keep M/F mix powered on for other low-power modes */