[SCSI] hpsa: do not read from controller unnecessarily in completion code
MSI/MSI-X interrupts can't race the DMA completion they are communicating so no need to read from controller to flush the DMA to the host if MSI or MSI-X interrupts are being used. Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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@ -258,12 +258,12 @@ static unsigned long SA5_performant_completed(struct ctlr_info *h)
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{
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unsigned long register_value = FIFO_EMPTY;
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/* flush the controller write of the reply queue by reading
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* outbound doorbell status register.
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*/
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register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
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/* msi auto clears the interrupt pending bit. */
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if (!(h->msi_vector || h->msix_vector)) {
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/* flush the controller write of the reply queue by reading
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* outbound doorbell status register.
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*/
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register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
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writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR);
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/* Do a read in order to flush the write to the controller
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* (as per spec.)
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