ixgbe: Implement HAVE_SET_RX_MODE
Implement HAVE_SET_RX_MODE in the driver for MC and UC lists. Signed-off-by: Christopher Leech <christopher.leech@intel.com> Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>hifive-unleashed-5.1
Christopher Leech
Jeff Garzik
parent
9da09bb1b8
commit
2c5645cf65
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@ -36,6 +36,8 @@
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#define IXGBE_82598_MAX_TX_QUEUES 32
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#define IXGBE_82598_MAX_RX_QUEUES 64
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#define IXGBE_82598_RAR_ENTRIES 16
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#define IXGBE_82598_MC_TBL_SIZE 128
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#define IXGBE_82598_VFT_TBL_SIZE 128
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static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw);
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static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
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@ -60,7 +62,9 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
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{
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hw->mac.num_rx_queues = IXGBE_82598_MAX_RX_QUEUES;
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hw->mac.num_tx_queues = IXGBE_82598_MAX_TX_QUEUES;
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hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES;
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hw->mac.mcft_size = IXGBE_82598_MC_TBL_SIZE;
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hw->mac.vft_size = IXGBE_82598_VFT_TBL_SIZE;
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hw->mac.num_rar_entries = IXGBE_82598_RAR_ENTRIES;
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/* PHY ops are filled in by default properly for Fiber only */
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if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) {
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@ -661,7 +661,7 @@ s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vind,
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static s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
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{
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u32 i;
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u32 rar_entries = hw->mac.num_rx_addrs;
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u32 rar_entries = hw->mac.num_rar_entries;
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/*
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* If the current mac address is valid, assume it is a software override
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@ -705,12 +705,113 @@ static s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
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IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type);
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hw_dbg(hw, " Clearing MTA\n");
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for (i = 0; i < IXGBE_MC_TBL_SIZE; i++)
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for (i = 0; i < hw->mac.mcft_size; i++)
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IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0);
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return 0;
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}
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/**
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* ixgbe_add_uc_addr - Adds a secondary unicast address.
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* @hw: pointer to hardware structure
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* @addr: new address
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*
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* Adds it to unused receive address register or goes into promiscuous mode.
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**/
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void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr)
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{
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u32 rar_entries = hw->mac.num_rar_entries;
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u32 rar;
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hw_dbg(hw, " UC Addr = %.2X %.2X %.2X %.2X %.2X %.2X\n",
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addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
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/*
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* Place this address in the RAR if there is room,
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* else put the controller into promiscuous mode
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*/
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if (hw->addr_ctrl.rar_used_count < rar_entries) {
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rar = hw->addr_ctrl.rar_used_count -
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hw->addr_ctrl.mc_addr_in_rar_count;
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ixgbe_set_rar(hw, rar, addr, 0, IXGBE_RAH_AV);
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hw_dbg(hw, "Added a secondary address to RAR[%d]\n", rar);
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hw->addr_ctrl.rar_used_count++;
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} else {
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hw->addr_ctrl.overflow_promisc++;
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}
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hw_dbg(hw, "ixgbe_add_uc_addr Complete\n");
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}
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/**
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* ixgbe_update_uc_addr_list - Updates MAC list of secondary addresses
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* @hw: pointer to hardware structure
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* @addr_list: the list of new addresses
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* @addr_count: number of addresses
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* @next: iterator function to walk the address list
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*
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* The given list replaces any existing list. Clears the secondary addrs from
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* receive address registers. Uses unused receive address registers for the
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* first secondary addresses, and falls back to promiscuous mode as needed.
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*
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* Drivers using secondary unicast addresses must set user_set_promisc when
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* manually putting the device into promiscuous mode.
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**/
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s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
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u32 addr_count, ixgbe_mc_addr_itr next)
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{
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u8 *addr;
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u32 i;
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u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc;
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u32 uc_addr_in_use;
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u32 fctrl;
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u32 vmdq;
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/*
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* Clear accounting of old secondary address list,
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* don't count RAR[0]
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*/
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uc_addr_in_use = hw->addr_ctrl.rar_used_count -
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hw->addr_ctrl.mc_addr_in_rar_count - 1;
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hw->addr_ctrl.rar_used_count -= uc_addr_in_use;
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hw->addr_ctrl.overflow_promisc = 0;
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/* Zero out the other receive addresses */
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hw_dbg(hw, "Clearing RAR[1-%d]\n", uc_addr_in_use);
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for (i = 1; i <= uc_addr_in_use; i++) {
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IXGBE_WRITE_REG(hw, IXGBE_RAL(i), 0);
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IXGBE_WRITE_REG(hw, IXGBE_RAH(i), 0);
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}
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/* Add the new addresses */
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for (i = 0; i < addr_count; i++) {
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hw_dbg(hw, " Adding the secondary addresses:\n");
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addr = next(hw, &addr_list, &vmdq);
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ixgbe_add_uc_addr(hw, addr);
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}
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if (hw->addr_ctrl.overflow_promisc) {
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/* enable promisc if not already in overflow or set by user */
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if (!old_promisc_setting && !hw->addr_ctrl.user_set_promisc) {
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hw_dbg(hw, " Entering address overflow promisc mode\n");
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fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
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fctrl |= IXGBE_FCTRL_UPE;
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IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
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}
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} else {
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/* only disable if set by overflow, not by user */
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if (old_promisc_setting && !hw->addr_ctrl.user_set_promisc) {
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hw_dbg(hw, " Leaving address overflow promisc mode\n");
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fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
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fctrl &= ~IXGBE_FCTRL_UPE;
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IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
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}
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}
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hw_dbg(hw, "ixgbe_update_uc_addr_list Complete\n");
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return 0;
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}
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/**
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* ixgbe_mta_vector - Determines bit-vector in multicast table to set
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* @hw: pointer to hardware structure
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@ -794,7 +895,7 @@ static void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr)
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**/
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static void ixgbe_add_mc_addr(struct ixgbe_hw *hw, u8 *mc_addr)
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{
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u32 rar_entries = hw->mac.num_rx_addrs;
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u32 rar_entries = hw->mac.num_rar_entries;
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hw_dbg(hw, " MC Addr =%.2X %.2X %.2X %.2X %.2X %.2X\n",
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mc_addr[0], mc_addr[1], mc_addr[2],
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@ -823,7 +924,7 @@ static void ixgbe_add_mc_addr(struct ixgbe_hw *hw, u8 *mc_addr)
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* @hw: pointer to hardware structure
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* @mc_addr_list: the list of new multicast addresses
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* @mc_addr_count: number of addresses
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* @pad: number of bytes between addresses in the list
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* @next: iterator function to walk the multicast address list
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*
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* The given list replaces any existing list. Clears the MC addrs from receive
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* address registers and the multicast table. Uses unsed receive address
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@ -831,10 +932,11 @@ static void ixgbe_add_mc_addr(struct ixgbe_hw *hw, u8 *mc_addr)
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* multicast table.
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**/
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s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
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u32 mc_addr_count, u32 pad)
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u32 mc_addr_count, ixgbe_mc_addr_itr next)
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{
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u32 i;
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u32 rar_entries = hw->mac.num_rx_addrs;
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u32 rar_entries = hw->mac.num_rar_entries;
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u32 vmdq;
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/*
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* Set the new number of MC addresses that we are being requested to
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@ -854,14 +956,13 @@ s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
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/* Clear the MTA */
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hw_dbg(hw, " Clearing MTA\n");
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for (i = 0; i < IXGBE_MC_TBL_SIZE; i++)
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for (i = 0; i < hw->mac.mcft_size; i++)
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IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0);
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/* Add the new addresses */
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for (i = 0; i < mc_addr_count; i++) {
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hw_dbg(hw, " Adding the multicast addresses:\n");
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ixgbe_add_mc_addr(hw, mc_addr_list +
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(i * (IXGBE_ETH_LENGTH_OF_ADDRESS + pad)));
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ixgbe_add_mc_addr(hw, next(hw, &mc_addr_list, &vmdq));
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}
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/* Enable mta */
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@ -884,11 +985,11 @@ static s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
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u32 offset;
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u32 vlanbyte;
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for (offset = 0; offset < IXGBE_VLAN_FILTER_TBL_SIZE; offset++)
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for (offset = 0; offset < hw->mac.vft_size; offset++)
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IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0);
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for (vlanbyte = 0; vlanbyte < 4; vlanbyte++)
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for (offset = 0; offset < IXGBE_VLAN_FILTER_TBL_SIZE; offset++)
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for (offset = 0; offset < hw->mac.vft_size; offset++)
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IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset),
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0);
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@ -47,7 +47,9 @@ s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
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s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vind,
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u32 enable_addr);
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s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
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u32 mc_addr_count, u32 pad);
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u32 mc_addr_count, ixgbe_mc_addr_itr next);
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s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *uc_addr_list,
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u32 mc_addr_count, ixgbe_mc_addr_itr next);
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s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on);
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s32 ixgbe_validate_mac_addr(u8 *mac_addr);
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@ -1619,23 +1619,37 @@ static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
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}
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}
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static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
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{
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struct dev_mc_list *mc_ptr;
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u8 *addr = *mc_addr_ptr;
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*vmdq = 0;
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mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
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if (mc_ptr->next)
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*mc_addr_ptr = mc_ptr->next->dmi_addr;
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else
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*mc_addr_ptr = NULL;
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return addr;
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}
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/**
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* ixgbe_set_multi - Multicast and Promiscuous mode set
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* ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
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* @netdev: network interface device structure
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*
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* The set_multi entry point is called whenever the multicast address
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* list or the network interface flags are updated. This routine is
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* responsible for configuring the hardware for proper multicast,
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* promiscuous mode, and all-multi behavior.
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* The set_rx_method entry point is called whenever the unicast/multicast
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* address list or the network interface flags are updated. This routine is
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* responsible for configuring the hardware for proper unicast, multicast and
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* promiscuous mode.
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**/
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static void ixgbe_set_multi(struct net_device *netdev)
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static void ixgbe_set_rx_mode(struct net_device *netdev)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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struct ixgbe_hw *hw = &adapter->hw;
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struct dev_mc_list *mc_ptr;
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u8 *mta_list;
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u32 fctrl, vlnctrl;
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int i;
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u8 *addr_list = NULL;
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int addr_count = 0;
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/* Check for Promiscuous and All Multicast modes */
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@ -1643,6 +1657,7 @@ static void ixgbe_set_multi(struct net_device *netdev)
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vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
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if (netdev->flags & IFF_PROMISC) {
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hw->addr_ctrl.user_set_promisc = 1;
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fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
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vlnctrl &= ~IXGBE_VLNCTRL_VFE;
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} else {
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@ -1653,33 +1668,25 @@ static void ixgbe_set_multi(struct net_device *netdev)
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fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
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}
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vlnctrl |= IXGBE_VLNCTRL_VFE;
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hw->addr_ctrl.user_set_promisc = 0;
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}
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IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
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IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
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if (netdev->mc_count) {
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mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
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if (!mta_list)
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return;
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/* Shared function expects packed array of only addresses. */
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mc_ptr = netdev->mc_list;
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for (i = 0; i < netdev->mc_count; i++) {
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if (!mc_ptr)
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break;
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memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
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ETH_ALEN);
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mc_ptr = mc_ptr->next;
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}
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ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
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kfree(mta_list);
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} else {
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ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
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}
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/* reprogram secondary unicast list */
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addr_count = netdev->uc_count;
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if (addr_count)
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addr_list = netdev->uc_list->dmi_addr;
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ixgbe_update_uc_addr_list(hw, addr_list, addr_count,
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ixgbe_addr_list_itr);
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/* reprogram multicast list */
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addr_count = netdev->mc_count;
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if (addr_count)
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addr_list = netdev->mc_list->dmi_addr;
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ixgbe_update_mc_addr_list(hw, addr_list, addr_count,
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ixgbe_addr_list_itr);
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}
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static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
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@ -1723,7 +1730,7 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)
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struct net_device *netdev = adapter->netdev;
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int i;
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ixgbe_set_multi(netdev);
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ixgbe_set_rx_mode(netdev);
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ixgbe_restore_vlan(adapter);
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@ -3508,7 +3515,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
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netdev->stop = &ixgbe_close;
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netdev->hard_start_xmit = &ixgbe_xmit_frame;
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netdev->get_stats = &ixgbe_get_stats;
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netdev->set_multicast_list = &ixgbe_set_multi;
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netdev->set_rx_mode = &ixgbe_set_rx_mode;
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netdev->set_multicast_list = &ixgbe_set_rx_mode;
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netdev->set_mac_address = &ixgbe_set_mac;
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netdev->change_mtu = &ixgbe_change_mtu;
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ixgbe_set_ethtool_ops(netdev);
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@ -822,10 +822,6 @@
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#define IXGBE_RAH_VIND_SHIFT 18
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#define IXGBE_RAH_AV 0x80000000
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/* Filters */
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#define IXGBE_MC_TBL_SIZE 128 /* Multicast Filter Table (4096 bits) */
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#define IXGBE_VLAN_FILTER_TBL_SIZE 128 /* VLAN Filter Table (4096 bits) */
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/* Header split receive */
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#define IXGBE_RFCTL_ISCSI_DIS 0x00000001
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#define IXGBE_RFCTL_ISCSI_DWC_MASK 0x0000003E
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@ -1167,6 +1163,8 @@ struct ixgbe_addr_filter_info {
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u32 rar_used_count;
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u32 mc_addr_in_rar_count;
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u32 mta_in_use;
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u32 overflow_promisc;
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bool user_set_promisc;
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};
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/* Flow control parameters */
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@ -1242,6 +1240,10 @@ struct ixgbe_hw_stats {
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/* forward declaration */
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struct ixgbe_hw;
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/* iterator type for walking multicast address lists */
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typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr,
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u32 *vmdq);
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struct ixgbe_mac_operations {
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s32 (*reset)(struct ixgbe_hw *);
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enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);
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@ -1263,9 +1265,11 @@ struct ixgbe_mac_info {
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u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
|
||||
u8 perm_addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
|
||||
s32 mc_filter_type;
|
||||
u32 mcft_size;
|
||||
u32 vft_size;
|
||||
u32 num_rar_entries;
|
||||
u32 num_rx_queues;
|
||||
u32 num_tx_queues;
|
||||
u32 num_rx_addrs;
|
||||
u32 link_attach_type;
|
||||
u32 link_mode_select;
|
||||
bool link_settings_loaded;
|
||||
|
|
|
|||
Loading…
Reference in New Issue