drm/i915/selftests: Add basic sanitychecks for execlists
Before adding a new feature to execlists submission, we should endeavour to cover the baseline behaviour with selftests. So start the ball rolling. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michał Winiarski <michal.winiarski@intel.com> CC: Michel Thierry <michel.thierry@intel.com> Cc: Jeff McGee <jeff.mcgee@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180404093329.5383-1-chris@chris-wilson.co.ukhifive-unleashed-5.1
Chris Wilson
parent
6be1187dbf
commit
2c66555ec1
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@ -2609,3 +2609,7 @@ void intel_lr_context_resume(struct drm_i915_private *dev_priv)
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}
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}
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}
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#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
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#include "selftests/intel_lrc.c"
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#endif
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@ -20,4 +20,5 @@ selftest(evict, i915_gem_evict_live_selftests)
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selftest(hugepages, i915_gem_huge_page_live_selftests)
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selftest(contexts, i915_gem_context_live_selftests)
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selftest(hangcheck, intel_hangcheck_live_selftests)
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selftest(execlists, intel_execlists_live_selftests)
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selftest(guc, intel_guc_live_selftest)
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@ -0,0 +1,507 @@
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/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2018 Intel Corporation
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*/
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#include "../i915_selftest.h"
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#include "mock_context.h"
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struct spinner {
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struct drm_i915_private *i915;
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struct drm_i915_gem_object *hws;
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struct drm_i915_gem_object *obj;
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u32 *batch;
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void *seqno;
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};
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static int spinner_init(struct spinner *spin, struct drm_i915_private *i915)
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{
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unsigned int mode;
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void *vaddr;
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int err;
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GEM_BUG_ON(INTEL_GEN(i915) < 8);
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memset(spin, 0, sizeof(*spin));
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spin->i915 = i915;
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spin->hws = i915_gem_object_create_internal(i915, PAGE_SIZE);
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if (IS_ERR(spin->hws)) {
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err = PTR_ERR(spin->hws);
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goto err;
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}
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spin->obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
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if (IS_ERR(spin->obj)) {
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err = PTR_ERR(spin->obj);
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goto err_hws;
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}
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i915_gem_object_set_cache_level(spin->hws, I915_CACHE_LLC);
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vaddr = i915_gem_object_pin_map(spin->hws, I915_MAP_WB);
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if (IS_ERR(vaddr)) {
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err = PTR_ERR(vaddr);
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goto err_obj;
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}
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spin->seqno = memset(vaddr, 0xff, PAGE_SIZE);
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mode = HAS_LLC(i915) ? I915_MAP_WB : I915_MAP_WC;
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vaddr = i915_gem_object_pin_map(spin->obj, mode);
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if (IS_ERR(vaddr)) {
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err = PTR_ERR(vaddr);
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goto err_unpin_hws;
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}
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spin->batch = vaddr;
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return 0;
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err_unpin_hws:
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i915_gem_object_unpin_map(spin->hws);
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err_obj:
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i915_gem_object_put(spin->obj);
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err_hws:
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i915_gem_object_put(spin->hws);
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err:
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return err;
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}
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static unsigned int seqno_offset(u64 fence)
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{
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return offset_in_page(sizeof(u32) * fence);
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}
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static u64 hws_address(const struct i915_vma *hws,
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const struct i915_request *rq)
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{
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return hws->node.start + seqno_offset(rq->fence.context);
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}
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static int emit_recurse_batch(struct spinner *spin,
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struct i915_request *rq,
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u32 arbitration_command)
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{
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struct i915_address_space *vm = &rq->ctx->ppgtt->base;
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struct i915_vma *hws, *vma;
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u32 *batch;
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int err;
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vma = i915_vma_instance(spin->obj, vm, NULL);
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if (IS_ERR(vma))
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return PTR_ERR(vma);
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hws = i915_vma_instance(spin->hws, vm, NULL);
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if (IS_ERR(hws))
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return PTR_ERR(hws);
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err = i915_vma_pin(vma, 0, 0, PIN_USER);
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if (err)
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return err;
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err = i915_vma_pin(hws, 0, 0, PIN_USER);
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if (err)
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goto unpin_vma;
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i915_vma_move_to_active(vma, rq, 0);
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if (!i915_gem_object_has_active_reference(vma->obj)) {
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i915_gem_object_get(vma->obj);
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i915_gem_object_set_active_reference(vma->obj);
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}
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i915_vma_move_to_active(hws, rq, 0);
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if (!i915_gem_object_has_active_reference(hws->obj)) {
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i915_gem_object_get(hws->obj);
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i915_gem_object_set_active_reference(hws->obj);
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}
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batch = spin->batch;
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*batch++ = MI_STORE_DWORD_IMM_GEN4;
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*batch++ = lower_32_bits(hws_address(hws, rq));
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*batch++ = upper_32_bits(hws_address(hws, rq));
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*batch++ = rq->fence.seqno;
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*batch++ = arbitration_command;
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*batch++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
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*batch++ = lower_32_bits(vma->node.start);
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*batch++ = upper_32_bits(vma->node.start);
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*batch++ = MI_BATCH_BUFFER_END; /* not reached */
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i915_gem_chipset_flush(spin->i915);
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err = rq->engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, 0);
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i915_vma_unpin(hws);
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unpin_vma:
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i915_vma_unpin(vma);
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return err;
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}
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static struct i915_request *
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spinner_create_request(struct spinner *spin,
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struct i915_gem_context *ctx,
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struct intel_engine_cs *engine,
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u32 arbitration_command)
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{
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struct i915_request *rq;
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int err;
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rq = i915_request_alloc(engine, ctx);
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if (IS_ERR(rq))
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return rq;
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err = emit_recurse_batch(spin, rq, arbitration_command);
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if (err) {
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__i915_request_add(rq, false);
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return ERR_PTR(err);
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}
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return rq;
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}
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static u32 hws_seqno(const struct spinner *spin, const struct i915_request *rq)
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{
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u32 *seqno = spin->seqno + seqno_offset(rq->fence.context);
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return READ_ONCE(*seqno);
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}
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struct wedge_me {
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struct delayed_work work;
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struct drm_i915_private *i915;
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const void *symbol;
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};
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static void wedge_me(struct work_struct *work)
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{
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struct wedge_me *w = container_of(work, typeof(*w), work.work);
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pr_err("%pS timed out, cancelling all further testing.\n", w->symbol);
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GEM_TRACE("%pS timed out.\n", w->symbol);
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GEM_TRACE_DUMP();
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i915_gem_set_wedged(w->i915);
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}
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static void __init_wedge(struct wedge_me *w,
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struct drm_i915_private *i915,
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long timeout,
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const void *symbol)
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{
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w->i915 = i915;
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w->symbol = symbol;
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INIT_DELAYED_WORK_ONSTACK(&w->work, wedge_me);
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schedule_delayed_work(&w->work, timeout);
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}
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static void __fini_wedge(struct wedge_me *w)
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{
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cancel_delayed_work_sync(&w->work);
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destroy_delayed_work_on_stack(&w->work);
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w->i915 = NULL;
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}
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#define wedge_on_timeout(W, DEV, TIMEOUT) \
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for (__init_wedge((W), (DEV), (TIMEOUT), __builtin_return_address(0)); \
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(W)->i915; \
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__fini_wedge((W)))
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static noinline int
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flush_test(struct drm_i915_private *i915, unsigned int flags)
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{
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struct wedge_me w;
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cond_resched();
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wedge_on_timeout(&w, i915, HZ)
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i915_gem_wait_for_idle(i915, flags);
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return i915_terminally_wedged(&i915->gpu_error) ? -EIO : 0;
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}
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static void spinner_end(struct spinner *spin)
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{
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*spin->batch = MI_BATCH_BUFFER_END;
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i915_gem_chipset_flush(spin->i915);
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}
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static void spinner_fini(struct spinner *spin)
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{
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spinner_end(spin);
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i915_gem_object_unpin_map(spin->obj);
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i915_gem_object_put(spin->obj);
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i915_gem_object_unpin_map(spin->hws);
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i915_gem_object_put(spin->hws);
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}
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static bool wait_for_spinner(struct spinner *spin, struct i915_request *rq)
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{
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if (!wait_event_timeout(rq->execute,
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READ_ONCE(rq->global_seqno),
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msecs_to_jiffies(10)))
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return false;
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return !(wait_for_us(i915_seqno_passed(hws_seqno(spin, rq),
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rq->fence.seqno),
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10) &&
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wait_for(i915_seqno_passed(hws_seqno(spin, rq),
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rq->fence.seqno),
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1000));
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}
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static int live_sanitycheck(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct intel_engine_cs *engine;
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struct i915_gem_context *ctx;
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enum intel_engine_id id;
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struct spinner spin;
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int err = -ENOMEM;
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if (!HAS_LOGICAL_RING_CONTEXTS(i915))
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return 0;
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mutex_lock(&i915->drm.struct_mutex);
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if (spinner_init(&spin, i915))
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goto err_unlock;
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ctx = kernel_context(i915);
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if (!ctx)
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goto err_spin;
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for_each_engine(engine, i915, id) {
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struct i915_request *rq;
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rq = spinner_create_request(&spin, ctx, engine, MI_NOOP);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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goto err_ctx;
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}
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i915_request_add(rq);
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if (!wait_for_spinner(&spin, rq)) {
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GEM_TRACE("spinner failed to start\n");
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GEM_TRACE_DUMP();
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i915_gem_set_wedged(i915);
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err = -EIO;
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goto err_ctx;
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}
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spinner_end(&spin);
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if (flush_test(i915, I915_WAIT_LOCKED)) {
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err = -EIO;
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goto err_ctx;
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}
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}
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err = 0;
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err_ctx:
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kernel_context_close(ctx);
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err_spin:
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spinner_fini(&spin);
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err_unlock:
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flush_test(i915, I915_WAIT_LOCKED);
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mutex_unlock(&i915->drm.struct_mutex);
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return err;
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}
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static int live_preempt(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct i915_gem_context *ctx_hi, *ctx_lo;
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struct spinner spin_hi, spin_lo;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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int err = -ENOMEM;
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if (!HAS_LOGICAL_RING_PREEMPTION(i915))
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return 0;
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mutex_lock(&i915->drm.struct_mutex);
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if (spinner_init(&spin_hi, i915))
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goto err_unlock;
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if (spinner_init(&spin_lo, i915))
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goto err_spin_hi;
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ctx_hi = kernel_context(i915);
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if (!ctx_hi)
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goto err_spin_lo;
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ctx_hi->priority = I915_CONTEXT_MAX_USER_PRIORITY;
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ctx_lo = kernel_context(i915);
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if (!ctx_lo)
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goto err_ctx_hi;
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ctx_lo->priority = I915_CONTEXT_MIN_USER_PRIORITY;
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for_each_engine(engine, i915, id) {
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struct i915_request *rq;
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rq = spinner_create_request(&spin_lo, ctx_lo, engine,
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MI_ARB_CHECK);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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goto err_ctx_lo;
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}
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i915_request_add(rq);
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if (!wait_for_spinner(&spin_lo, rq)) {
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GEM_TRACE("lo spinner failed to start\n");
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GEM_TRACE_DUMP();
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i915_gem_set_wedged(i915);
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err = -EIO;
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goto err_ctx_lo;
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}
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rq = spinner_create_request(&spin_hi, ctx_hi, engine,
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MI_ARB_CHECK);
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if (IS_ERR(rq)) {
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spinner_end(&spin_lo);
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err = PTR_ERR(rq);
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goto err_ctx_lo;
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}
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i915_request_add(rq);
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if (!wait_for_spinner(&spin_hi, rq)) {
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GEM_TRACE("hi spinner failed to start\n");
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GEM_TRACE_DUMP();
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i915_gem_set_wedged(i915);
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err = -EIO;
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goto err_ctx_lo;
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}
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spinner_end(&spin_hi);
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spinner_end(&spin_lo);
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if (flush_test(i915, I915_WAIT_LOCKED)) {
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err = -EIO;
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goto err_ctx_lo;
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}
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}
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err = 0;
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err_ctx_lo:
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kernel_context_close(ctx_lo);
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err_ctx_hi:
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kernel_context_close(ctx_hi);
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err_spin_lo:
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spinner_fini(&spin_lo);
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err_spin_hi:
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spinner_fini(&spin_hi);
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err_unlock:
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flush_test(i915, I915_WAIT_LOCKED);
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mutex_unlock(&i915->drm.struct_mutex);
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return err;
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}
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static int live_late_preempt(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct i915_gem_context *ctx_hi, *ctx_lo;
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struct spinner spin_hi, spin_lo;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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int err = -ENOMEM;
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if (!HAS_LOGICAL_RING_PREEMPTION(i915))
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return 0;
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mutex_lock(&i915->drm.struct_mutex);
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if (spinner_init(&spin_hi, i915))
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goto err_unlock;
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if (spinner_init(&spin_lo, i915))
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goto err_spin_hi;
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ctx_hi = kernel_context(i915);
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if (!ctx_hi)
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goto err_spin_lo;
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ctx_lo = kernel_context(i915);
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if (!ctx_lo)
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goto err_ctx_hi;
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for_each_engine(engine, i915, id) {
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struct i915_request *rq;
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rq = spinner_create_request(&spin_lo, ctx_lo, engine,
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MI_ARB_CHECK);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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goto err_ctx_lo;
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}
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i915_request_add(rq);
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if (!wait_for_spinner(&spin_lo, rq)) {
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pr_err("First context failed to start\n");
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goto err_wedged;
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}
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rq = spinner_create_request(&spin_hi, ctx_hi, engine, MI_NOOP);
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if (IS_ERR(rq)) {
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spinner_end(&spin_lo);
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err = PTR_ERR(rq);
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goto err_ctx_lo;
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}
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i915_request_add(rq);
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if (wait_for_spinner(&spin_hi, rq)) {
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pr_err("Second context overtook first?\n");
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goto err_wedged;
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}
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engine->schedule(rq, I915_PRIORITY_MAX);
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|
||||
if (!wait_for_spinner(&spin_hi, rq)) {
|
||||
pr_err("High priority context failed to preempt the low priority context\n");
|
||||
GEM_TRACE_DUMP();
|
||||
goto err_wedged;
|
||||
}
|
||||
|
||||
spinner_end(&spin_hi);
|
||||
spinner_end(&spin_lo);
|
||||
if (flush_test(i915, I915_WAIT_LOCKED)) {
|
||||
err = -EIO;
|
||||
goto err_ctx_lo;
|
||||
}
|
||||
}
|
||||
|
||||
err = 0;
|
||||
err_ctx_lo:
|
||||
kernel_context_close(ctx_lo);
|
||||
err_ctx_hi:
|
||||
kernel_context_close(ctx_hi);
|
||||
err_spin_lo:
|
||||
spinner_fini(&spin_lo);
|
||||
err_spin_hi:
|
||||
spinner_fini(&spin_hi);
|
||||
err_unlock:
|
||||
flush_test(i915, I915_WAIT_LOCKED);
|
||||
mutex_unlock(&i915->drm.struct_mutex);
|
||||
return err;
|
||||
|
||||
err_wedged:
|
||||
spinner_end(&spin_hi);
|
||||
spinner_end(&spin_lo);
|
||||
i915_gem_set_wedged(i915);
|
||||
err = -EIO;
|
||||
goto err_ctx_lo;
|
||||
}
|
||||
|
||||
int intel_execlists_live_selftests(struct drm_i915_private *i915)
|
||||
{
|
||||
static const struct i915_subtest tests[] = {
|
||||
SUBTEST(live_sanitycheck),
|
||||
SUBTEST(live_preempt),
|
||||
SUBTEST(live_late_preempt),
|
||||
};
|
||||
return i915_subtests(tests, i915);
|
||||
}
|
||||
Loading…
Reference in New Issue