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ARM: OMAP: Remove plat/io.h by splitting it into mach/io.h and mach/hardware.h

This is needed to minimize io.h so the SoC specific io.h
for ARMs can removed.

Note that minimal driver changes for DSS and RNG are needed to
include cpu.h for SoC detection macros.

Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Tony Lindgren <tony@atomide.com>
hifive-unleashed-5.1
Tony Lindgren 2012-02-24 10:34:35 -08:00
parent ee0839c22c
commit 2c799cef4d
32 changed files with 184 additions and 109 deletions

View File

@ -15,6 +15,7 @@
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
@ -26,6 +27,8 @@
#include <plat/sram.h>
#include <plat/clkdev_omap.h>
#include <mach/hardware.h>
#include "iomap.h"
#include "clock.h"
#include "opp.h"

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@ -15,6 +15,7 @@
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/cpufreq.h>
#include <linux/delay.h>
@ -27,6 +28,8 @@
#include <plat/sram.h> /* for omap_sram_reprogram_clock() */
#include <plat/usb.h> /* for OTG_BASE */
#include <mach/hardware.h>
#include "iomap.h"
#include "clock.h"

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@ -13,6 +13,8 @@
#include <plat/tc.h>
#include <plat/flash.h>
#include <mach/hardware.h>
void omap1_set_vpp(struct platform_device *pdev, int enable)
{
static int count;

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@ -18,6 +18,8 @@
#include <plat/cpu.h>
#include <mach/hardware.h>
#define OMAP_DIE_ID_0 0xfffe1800
#define OMAP_DIE_ID_1 0xfffe1804
#define OMAP_PRODUCTION_ID_0 0xfffe2000

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@ -2,4 +2,40 @@
* arch/arm/mach-omap1/include/mach/hardware.h
*/
#ifndef __MACH_HARDWARE_H
#define __MACH_HARDWARE_H
#ifndef __ASSEMBLER__
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
extern u8 omap_readb(u32 pa);
extern u16 omap_readw(u32 pa);
extern u32 omap_readl(u32 pa);
extern void omap_writeb(u8 v, u32 pa);
extern void omap_writew(u16 v, u32 pa);
extern void omap_writel(u32 v, u32 pa);
#include <plat/tc.h>
/* Almost all documentation for chip and board memory maps assumes
* BM is clear. Most devel boards have a switch to control booting
* from NOR flash (using external chipselect 3) rather than mask ROM,
* which uses BM to interchange the physical CS0 and CS3 addresses.
*/
static inline u32 omap_cs0m_phys(void)
{
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
? OMAP_CS3_PHYS : 0;
}
static inline u32 omap_cs3_phys(void)
{
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
? 0 : OMAP_CS3_PHYS;
}
#endif
#endif
#include <plat/hardware.h>

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@ -1,5 +1,46 @@
/*
* arch/arm/mach-omap1/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#include <plat/io.h>
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif

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@ -18,7 +18,8 @@
* Note that the is_lbus_device() test is not very efficient on 1510
* because of the strncmp().
*/
#ifdef CONFIG_ARCH_OMAP15XX
#if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__)
#include <plat/cpu.h>
/*
* OMAP-1510 Local Bus address offset

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@ -33,6 +33,7 @@
#include <linux/cpufreq.h>
#include <linux/slab.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>

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@ -22,6 +22,7 @@
#include <asm/div64.h>
#include <plat/clock.h>
#include <plat/cpu.h>
#include "clock.h"
#include "cm-regbits-24xx.h"

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@ -14,9 +14,11 @@
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/list.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "iomap.h"

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@ -21,6 +21,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/clock.h>
#include "iomap.h"

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@ -17,6 +17,7 @@
#include <linux/clk.h>
#include <linux/list.h>
#include <plat/hardware.h>
#include <plat/clkdev_omap.h>
#include "iomap.h"

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@ -22,6 +22,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include "clock.h"

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@ -21,6 +21,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <plat/hardware.h>
#include <plat/clock.h>
#include "clock.h"

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@ -242,5 +242,15 @@ struct omap_sdrc_params;
extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
struct omap_sdrc_params *sdrc_cs1);
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
extern u8 omap_readb(u32 pa);
extern u16 omap_readw(u32 pa);
extern u32 omap_readl(u32 pa);
extern void omap_writeb(u8 v, u32 pa);
extern void omap_writew(u16 v, u32 pa);
extern void omap_writel(u32 v, u32 pa);
#endif /* __ASSEMBLER__ */
#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */

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@ -16,6 +16,7 @@
#include <asm/mach/flash.h>
#include <plat/cpu.h>
#include <plat/nand.h>
#include <plat/board.h>
#include <plat/gpmc.h>

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@ -18,6 +18,7 @@
#include <asm/mach/flash.h>
#include <plat/cpu.h>
#include <plat/onenand.h>
#include <plat/board.h>
#include <plat/gpmc.h>

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@ -1,5 +1,49 @@
/*
* arch/arm/mach-omap2/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#include <plat/io.h>
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
#endif

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@ -28,6 +28,8 @@
* http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/
*/
#include <plat/hardware.h>
#include "opp2xxx.h"
#include "sdrc.h"
#include "clock.h"

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@ -26,6 +26,8 @@
* This is technically part of the OMAP2xxx clock code.
*/
#include <plat/hardware.h>
#include "opp2xxx.h"
#include "sdrc.h"
#include "clock.h"

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@ -26,7 +26,6 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/time.h>
#include <linux/gpio.h>
@ -42,7 +41,6 @@
#include <mach/irqs.h>
#include "iomap.h"
#include "common.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-24xx.h"

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@ -26,6 +26,7 @@
#include <asm/assembler.h>
#include <plat/hardware.h>
#include <plat/sram.h>
#include "iomap.h"

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@ -21,6 +21,7 @@
#include <asm/sched_clock.h>
#include <plat/hardware.h>
#include <plat/common.h>
#include <plat/board.h>

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@ -164,6 +164,8 @@ static inline void set_gdma_dev(int req, int dev)
}
#else
#define set_gdma_dev(req, dev) do {} while (0)
#define omap_readl(reg) 0
#define omap_writel(val, reg) do {} while (0)
#endif
void omap_set_dma_priority(int lch, int dst_port, int priority)

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@ -43,6 +43,8 @@
#include <plat/dmtimer.h>
#include <mach/hardware.h>
static LIST_HEAD(omap_timer_list);
static DEFINE_SPINLOCK(dm_timer_lock);

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@ -43,6 +43,12 @@
#endif
#include <plat/serial.h>
#ifdef __ASSEMBLER__
#define IOMEM(x) (x)
#else
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
/*
* ---------------------------------------------------------------------------
* Common definitions for all OMAP processors

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@ -1,84 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/io.h
*
* IO definitions for TI OMAP processors and boards
*
* Copied from arch/arm/mach-sa1100/include/mach/io.h
* Copyright (C) 1997-1999 Russell King
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Modifications:
* 06-12-1997 RMK Created.
* 07-04-1999 RMK Major cleanup
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#include <mach/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) __typesafe_io(a)
#define __mem_pci(a) (a)
/*
* ----------------------------------------------------------------------------
* I/O mapping
* ----------------------------------------------------------------------------
*/
#ifdef __ASSEMBLER__
#define IOMEM(x) (x)
#else
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
/*
* ----------------------------------------------------------------------------
* Omap specific register access
* ----------------------------------------------------------------------------
*/
#ifndef __ASSEMBLER__
/*
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
*/
extern u8 omap_readb(u32 pa);
extern u16 omap_readw(u32 pa);
extern u32 omap_readl(u32 pa);
extern void omap_writeb(u8 v, u32 pa);
extern void omap_writew(u16 v, u32 pa);
extern void omap_writel(u32 v, u32 pa);
#endif
#endif

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@ -84,25 +84,6 @@
#define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n)))
#define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n)))
/* Almost all documentation for chip and board memory maps assumes
* BM is clear. Most devel boards have a switch to control booting
* from NOR flash (using external chipselect 3) rather than mask ROM,
* which uses BM to interchange the physical CS0 and CS3 addresses.
*/
#ifdef CONFIG_ARCH_OMAP1
static inline u32 omap_cs0m_phys(void)
{
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
? OMAP_CS3_PHYS : 0;
}
static inline u32 omap_cs3_phys(void)
{
return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
? 0 : OMAP_CS3_PHYS;
}
#endif
#endif /* __ASSEMBLER__ */
#endif /* __ASM_ARCH_TC_H */

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@ -26,8 +26,11 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/system.h>
#include <linux/spinlock.h>
#include <asm/system.h>
#include <plat/cpu.h>
#include <plat/mux.h>
#ifdef CONFIG_OMAP_MUX

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@ -29,6 +29,10 @@
#include <plat/usb.h>
#include <plat/board.h>
#include <mach/hardware.h>
#include "../mach-omap2/common.h"
#ifdef CONFIG_ARCH_OMAP_OTG
void __init

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@ -26,6 +26,8 @@
#include <asm/io.h>
#include <plat/cpu.h>
#define RNG_OUT_REG 0x00 /* Output register */
#define RNG_STAT_REG 0x04 /* Status register
[0] = STAT_BUSY */

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@ -33,7 +33,10 @@
#include <linux/pm_runtime.h>
#include <video/omapdss.h>
#include <plat/cpu.h>
#include <plat/clock.h>
#include "dss.h"
#include "dss_features.h"