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PCI: Add MCFG quirks for Qualcomm QDF2432 host controller 

The Qualcomm Technologies QDF2432 SoC does not support accesses smaller
than 32 bits to the PCI configuration space.  Register the appropriate
quirk.

[bhelgaas: add QCOM_ECAM32 macro, ifdef for ACPI and PCI_QUIRKS]
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
hifive-unleashed-5.1
Christopher Covington 2016-11-02 11:11:27 -05:00 committed by Bjorn Helgaas
parent 169de969c0
commit 2ca5b8ddc6
3 changed files with 27 additions and 0 deletions
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11
drivers/acpi/pci_mcfg.c
View File

@ -51,6 +51,17 @@ struct mcfg_fixup {
static struct mcfg_fixup mcfg_quirks[] = {
/* { OEM_ID, OEM_TABLE_ID, REV, SEGMENT, BUS_RANGE, ops, cfgres }, */
#define QCOM_ECAM32(seg) \
{ "QCOM ", "QDF2432 ", 1, seg, MCFG_BUS_ANY, &pci_32b_ops }
QCOM_ECAM32(0),
QCOM_ECAM32(1),
QCOM_ECAM32(2),
QCOM_ECAM32(3),
QCOM_ECAM32(4),
QCOM_ECAM32(5),
QCOM_ECAM32(6),
QCOM_ECAM32(7),
};
static char mcfg_oem_id[ACPI_OEM_ID_SIZE];

12
drivers/pci/ecam.c
View File

@ -162,3 +162,15 @@ struct pci_ecam_ops pci_generic_ecam_ops = {
.write = pci_generic_config_write,
}
};
#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
/* ECAM ops for 32-bit access only (non-compliant) */
struct pci_ecam_ops pci_32b_ops = {
.bus_shift = 20,
.pci_ops = {
.map_bus = pci_ecam_map_bus,
.read = pci_generic_config_read32,
.write = pci_generic_config_write32,
}
};
#endif

4
include/linux/pci-ecam.h
View File

@ -59,6 +59,10 @@ void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
/* default ECAM ops */
extern struct pci_ecam_ops pci_generic_ecam_ops;
#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
extern struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */
#endif
#ifdef CONFIG_PCI_HOST_GENERIC
/* for DT-based PCI controllers that support ECAM */
int pci_host_common_probe(struct platform_device *pdev,