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KVM: x86 emulator: Make group storage bits separate from operand bits

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Currently group bits are stored in bits 0:7, where operand bits are stored.

Make group bits be 0:3, and move the existing bits 0:3 to 16:19, so we can
mix group and operand bits.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
This commit is contained in:
Avi Kivity 2010-07-26 14:37:46 +03:00
parent 880a188378
commit 2ce495365f
1 changed files with 9 additions and 9 deletions
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18
arch/x86/kvm/emulate.c
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@ -46,15 +46,15 @@
*/
/* Operand sizes: 8-bit operands or specified/overridden size. */
#define ByteOp (1<<0) /* 8-bit operands. */
#define ByteOp (1<<16) /* 8-bit operands. */
/* Destination operand type. */
#define ImplicitOps (1<<1) /* Implicit in opcode. No generic decode. */
#define DstReg (2<<1) /* Register operand. */
#define DstMem (3<<1) /* Memory operand. */
#define DstAcc (4<<1) /* Destination Accumulator */
#define DstDI (5<<1) /* Destination is in ES:(E)DI */
#define DstMem64 (6<<1) /* 64bit memory operand */
#define DstMask (7<<1)
#define ImplicitOps (1<<17) /* Implicit in opcode. No generic decode. */
#define DstReg (2<<17) /* Register operand. */
#define DstMem (3<<17) /* Memory operand. */
#define DstAcc (4<<17) /* Destination Accumulator */
#define DstDI (5<<17) /* Destination is in ES:(E)DI */
#define DstMem64 (6<<17) /* 64bit memory operand */
#define DstMask (7<<17)
/* Source operand type. */
#define SrcNone (0<<4) /* No source operand. */
#define SrcImplicit (0<<4) /* Source operand is implicit in the opcode. */
@ -82,7 +82,7 @@
#define Stack (1<<13) /* Stack instruction (push/pop) */
#define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */
#define GroupDual (1<<15) /* Alternate decoding of mod == 3 */
#define GroupMask 0xff /* Group number stored in bits 0:7 */
#define GroupMask 0x0f /* Group number stored in bits 0:3 */
/* Misc flags */
#define Lock (1<<26) /* lock prefix is allowed for the instruction */
#define Priv (1<<27) /* instruction generates #GP if current CPL != 0 */