From 2d0e3291c68c3229a7e4d45dede51ebcbac7dea2 Mon Sep 17 00:00:00 2001 From: Jacky Bai Date: Mon, 24 Feb 2020 09:28:55 +0800 Subject: [PATCH] MLK-23369 irqchip: gpcv2: Correct the max irq numbers for imx8mp For i.MX8MP, the max irq numbers is 160, so correct the max irq number in GPCv2 driver to Fix the IRQ number get failure issue if requested irq number > 128. Signed-off-by: Jacky Bai Reviewed-by: Anson Huang --- drivers/irqchip/irq-imx-gpcv2.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-imx-gpcv2.c index 16edb2f35a1e..8a10c880243a 100644 --- a/drivers/irqchip/irq-imx-gpcv2.c +++ b/drivers/irqchip/irq-imx-gpcv2.c @@ -25,6 +25,7 @@ #define IMR_NUM 4 #define GPC_MAX_IRQS (IMR_NUM * 32) +#define IMX8MP_MAX_IRQS 160 #define GPC_IMR1_CORE0 0x30 #define GPC_IMR1_CORE1 0x40 @@ -32,6 +33,7 @@ #define GPC_IMR1_CORE3 0x1d0 static unsigned int err11171; +static unsigned int gpc_max_irqs; struct gpcv2_irqchip_data { struct raw_spinlock rlock; @@ -308,7 +310,7 @@ static int imx_gpcv2_domain_alloc(struct irq_domain *domain, if (err) return err; - if (hwirq >= GPC_MAX_IRQS) + if (hwirq >= gpc_max_irqs) return -EINVAL; for (i = 0; i < nr_irqs; i++) { @@ -379,7 +381,12 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node, return -ENOMEM; } - domain = irq_domain_add_hierarchy(parent_domain, 0, GPC_MAX_IRQS, + if (of_machine_is_compatible("fsl,imx8mp")) + gpc_max_irqs = IMX8MP_MAX_IRQS; + else + gpc_max_irqs = GPC_MAX_IRQS; + + domain = irq_domain_add_hierarchy(parent_domain, 0, gpc_max_irqs, node, &gpcv2_irqchip_data_domain_ops, cd); if (!domain) { iounmap(cd->gpc_base);