netxen: fix ethtool register dump
o Dump registers such as tx ring and rx ring counter, firmware state, niu regs, etc. which can be useful for debugging purpose. Signed-off-by: Sucheta Chakraborty <sucheta.chakraborty@qlogic.com> Signed-off-by: Amit Kumar Salecha <amit.salecha@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sucheta Chakraborty
David S. Miller
parent
2585e7e5e1
commit
2d2cf34681
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@ -66,7 +66,7 @@ static const char netxen_nic_gstrings_test[][ETH_GSTRING_LEN] = {
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#define NETXEN_NIC_TEST_LEN ARRAY_SIZE(netxen_nic_gstrings_test)
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#define NETXEN_NIC_REGS_COUNT 42
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#define NETXEN_NIC_REGS_COUNT 30
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#define NETXEN_NIC_REGS_LEN (NETXEN_NIC_REGS_COUNT * sizeof(__le32))
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#define NETXEN_MAX_EEPROM_LEN 1024
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@ -312,125 +312,73 @@ static int netxen_nic_get_regs_len(struct net_device *dev)
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return NETXEN_NIC_REGS_LEN;
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}
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struct netxen_niu_regs {
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__u32 reg[NETXEN_NIC_REGS_COUNT];
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};
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static struct netxen_niu_regs niu_registers[] = {
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{
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/* GB Mode */
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{
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NETXEN_NIU_GB_SERDES_RESET,
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NETXEN_NIU_GB0_MII_MODE,
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NETXEN_NIU_GB1_MII_MODE,
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NETXEN_NIU_GB2_MII_MODE,
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NETXEN_NIU_GB3_MII_MODE,
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NETXEN_NIU_GB0_GMII_MODE,
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NETXEN_NIU_GB1_GMII_MODE,
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NETXEN_NIU_GB2_GMII_MODE,
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NETXEN_NIU_GB3_GMII_MODE,
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NETXEN_NIU_REMOTE_LOOPBACK,
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NETXEN_NIU_GB0_HALF_DUPLEX,
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NETXEN_NIU_GB1_HALF_DUPLEX,
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NETXEN_NIU_RESET_SYS_FIFOS,
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NETXEN_NIU_GB_CRC_DROP,
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NETXEN_NIU_GB_DROP_WRONGADDR,
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NETXEN_NIU_TEST_MUX_CTL,
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NETXEN_NIU_GB_MAC_CONFIG_0(0),
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NETXEN_NIU_GB_MAC_CONFIG_1(0),
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NETXEN_NIU_GB_HALF_DUPLEX_CTRL(0),
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NETXEN_NIU_GB_MAX_FRAME_SIZE(0),
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NETXEN_NIU_GB_TEST_REG(0),
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NETXEN_NIU_GB_MII_MGMT_CONFIG(0),
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NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
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NETXEN_NIU_GB_MII_MGMT_ADDR(0),
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NETXEN_NIU_GB_MII_MGMT_CTRL(0),
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NETXEN_NIU_GB_MII_MGMT_STATUS(0),
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NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
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NETXEN_NIU_GB_INTERFACE_CTRL(0),
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NETXEN_NIU_GB_INTERFACE_STATUS(0),
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NETXEN_NIU_GB_STATION_ADDR_0(0),
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NETXEN_NIU_GB_STATION_ADDR_1(0),
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-1,
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}
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},
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{
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/* XG Mode */
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{
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NETXEN_NIU_XG_SINGLE_TERM,
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NETXEN_NIU_XG_DRIVE_HI,
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NETXEN_NIU_XG_DRIVE_LO,
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NETXEN_NIU_XG_DTX,
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NETXEN_NIU_XG_DEQ,
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NETXEN_NIU_XG_WORD_ALIGN,
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NETXEN_NIU_XG_RESET,
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NETXEN_NIU_XG_POWER_DOWN,
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NETXEN_NIU_XG_RESET_PLL,
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NETXEN_NIU_XG_SERDES_LOOPBACK,
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NETXEN_NIU_XG_DO_BYTE_ALIGN,
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NETXEN_NIU_XG_TX_ENABLE,
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NETXEN_NIU_XG_RX_ENABLE,
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NETXEN_NIU_XG_STATUS,
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NETXEN_NIU_XG_PAUSE_THRESHOLD,
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NETXEN_NIU_XGE_CONFIG_0,
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NETXEN_NIU_XGE_CONFIG_1,
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NETXEN_NIU_XGE_IPG,
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NETXEN_NIU_XGE_STATION_ADDR_0_HI,
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NETXEN_NIU_XGE_STATION_ADDR_0_1,
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NETXEN_NIU_XGE_STATION_ADDR_1_LO,
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NETXEN_NIU_XGE_STATUS,
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NETXEN_NIU_XGE_MAX_FRAME_SIZE,
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NETXEN_NIU_XGE_PAUSE_FRAME_VALUE,
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NETXEN_NIU_XGE_TX_BYTE_CNT,
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NETXEN_NIU_XGE_TX_FRAME_CNT,
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NETXEN_NIU_XGE_RX_BYTE_CNT,
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NETXEN_NIU_XGE_RX_FRAME_CNT,
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NETXEN_NIU_XGE_AGGR_ERROR_CNT,
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NETXEN_NIU_XGE_MULTICAST_FRAME_CNT,
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NETXEN_NIU_XGE_UNICAST_FRAME_CNT,
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NETXEN_NIU_XGE_CRC_ERROR_CNT,
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NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
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NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
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NETXEN_NIU_XGE_LOCAL_ERROR_CNT,
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NETXEN_NIU_XGE_REMOTE_ERROR_CNT,
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NETXEN_NIU_XGE_CONTROL_CHAR_CNT,
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NETXEN_NIU_XGE_PAUSE_FRAME_CNT,
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-1,
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}
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}
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};
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static void
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netxen_nic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
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{
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struct netxen_adapter *adapter = netdev_priv(dev);
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__u32 mode, *regs_buff = p;
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int i, window;
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struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
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struct nx_host_sds_ring *sds_ring;
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u32 *regs_buff = p;
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int ring, i = 0;
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int port = adapter->physical_port;
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memset(p, 0, NETXEN_NIC_REGS_LEN);
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regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) |
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(adapter->pdev)->device;
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/* which mode */
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regs_buff[0] = NXRD32(adapter, NETXEN_NIU_MODE);
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mode = regs_buff[0];
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/* Common registers to all the modes */
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regs_buff[2] = NXRD32(adapter, NETXEN_NIU_STRAP_VALUE_SAVE_HIGHER);
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/* GB/XGB Mode */
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mode = (mode / 2) - 1;
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window = 0;
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if (mode <= 1) {
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for (i = 3; niu_registers[mode].reg[i - 3] != -1; i++) {
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/* GB: port specific registers */
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if (mode == 0 && i >= 19)
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window = adapter->physical_port *
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NETXEN_NIC_PORT_WINDOW;
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if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC)
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return;
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regs_buff[i] = NXRD32(adapter,
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niu_registers[mode].reg[i - 3] + window);
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}
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regs_buff[i++] = NXRD32(adapter, CRB_CMDPEG_STATE);
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regs_buff[i++] = NXRD32(adapter, CRB_RCVPEG_STATE);
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regs_buff[i++] = NXRD32(adapter, CRB_FW_CAPABILITIES_1);
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regs_buff[i++] = NXRDIO(adapter, adapter->crb_int_state_reg);
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regs_buff[i++] = NXRD32(adapter, NX_CRB_DEV_REF_COUNT);
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regs_buff[i++] = NXRD32(adapter, NX_CRB_DEV_STATE);
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regs_buff[i++] = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
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regs_buff[i++] = NXRD32(adapter, NETXEN_PEG_HALT_STATUS1);
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regs_buff[i++] = NXRD32(adapter, NETXEN_PEG_HALT_STATUS2);
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regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_0+0x3c);
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regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_1+0x3c);
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regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_2+0x3c);
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regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_3+0x3c);
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if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
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regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_4+0x3c);
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i += 2;
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regs_buff[i++] = NXRD32(adapter, CRB_XG_STATE_P3);
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regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
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} else {
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i++;
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regs_buff[i++] = NXRD32(adapter,
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NETXEN_NIU_XGE_CONFIG_0+(0x10000*port));
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regs_buff[i++] = NXRD32(adapter,
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NETXEN_NIU_XGE_CONFIG_1+(0x10000*port));
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regs_buff[i++] = NXRD32(adapter, CRB_XG_STATE);
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regs_buff[i++] = NXRDIO(adapter,
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adapter->tx_ring->crb_cmd_consumer);
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}
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regs_buff[i++] = NXRDIO(adapter, adapter->tx_ring->crb_cmd_producer);
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regs_buff[i++] = NXRDIO(adapter,
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recv_ctx->rds_rings[0].crb_rcv_producer);
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regs_buff[i++] = NXRDIO(adapter,
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recv_ctx->rds_rings[1].crb_rcv_producer);
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regs_buff[i++] = adapter->max_sds_rings;
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for (ring = 0; ring < adapter->max_sds_rings; ring++) {
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sds_ring = &(recv_ctx->sds_rings[ring]);
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regs_buff[i++] = NXRDIO(adapter,
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sds_ring->crb_sts_consumer);
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}
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}
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