|
|
|
@ -2381,6 +2381,7 @@ static int mv88e6xxx_stats_setup(struct mv88e6xxx_chip *chip)
|
|
|
|
|
static int mv88e6xxx_setup(struct dsa_switch *ds)
|
|
|
|
|
{
|
|
|
|
|
struct mv88e6xxx_chip *chip = ds->priv;
|
|
|
|
|
u8 cmode;
|
|
|
|
|
int err;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
@ -2389,6 +2390,17 @@ static int mv88e6xxx_setup(struct dsa_switch *ds)
|
|
|
|
|
|
|
|
|
|
mutex_lock(&chip->reg_lock);
|
|
|
|
|
|
|
|
|
|
/* Cache the cmode of each port. */
|
|
|
|
|
for (i = 0; i < mv88e6xxx_num_ports(chip); i++) {
|
|
|
|
|
if (chip->info->ops->port_get_cmode) {
|
|
|
|
|
err = chip->info->ops->port_get_cmode(chip, i, &cmode);
|
|
|
|
|
if (err)
|
|
|
|
|
return err;
|
|
|
|
|
|
|
|
|
|
chip->ports[i].cmode = cmode;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Setup Switch Port Registers */
|
|
|
|
|
for (i = 0; i < mv88e6xxx_num_ports(chip); i++) {
|
|
|
|
|
if (dsa_is_unused_port(ds, i))
|
|
|
|
@ -2697,6 +2709,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6185_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -2730,6 +2743,7 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
|
|
|
|
|
.port_set_egress_floods = mv88e6185_port_set_egress_floods,
|
|
|
|
|
.port_set_upstream_port = mv88e6095_port_set_upstream_port,
|
|
|
|
|
.port_link_state = mv88e6185_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6185_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -2765,6 +2779,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6185_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -2798,6 +2813,7 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6185_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -2834,6 +2850,7 @@ static const struct mv88e6xxx_ops mv88e6131_ops = {
|
|
|
|
|
.port_pause_limit = mv88e6097_port_pause_limit,
|
|
|
|
|
.port_set_pause = mv88e6185_port_set_pause,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6185_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -2876,6 +2893,7 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6390_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
@ -2915,6 +2933,7 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6185_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -2947,6 +2966,7 @@ static const struct mv88e6xxx_ops mv88e6165_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6185_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -2987,6 +3007,7 @@ static const struct mv88e6xxx_ops mv88e6171_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -3027,6 +3048,7 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -3068,6 +3090,7 @@ static const struct mv88e6xxx_ops mv88e6175_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -3108,6 +3131,7 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -3143,6 +3167,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
|
|
|
|
|
.port_set_upstream_port = mv88e6095_port_set_upstream_port,
|
|
|
|
|
.port_set_pause = mv88e6185_port_set_pause,
|
|
|
|
|
.port_link_state = mv88e6185_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6185_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6xxx_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -3181,6 +3206,7 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6390_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
@ -3220,6 +3246,7 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6390_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
@ -3259,6 +3286,7 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6390_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
@ -3303,6 +3331,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -3345,6 +3374,7 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6390_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
@ -3389,6 +3419,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
@ -3430,6 +3461,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
@ -3470,6 +3502,7 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6390_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
@ -3512,6 +3545,7 @@ static const struct mv88e6xxx_ops mv88e6350_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -3550,6 +3584,7 @@ static const struct mv88e6xxx_ops mv88e6351_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -3592,6 +3627,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6320_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6095_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6095_stats_get_sset_count,
|
|
|
|
@ -3639,6 +3675,7 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6390_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
@ -3683,6 +3720,7 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
|
|
|
|
|
.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
|
|
|
|
|
.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
|
|
|
|
|
.port_link_state = mv88e6352_port_link_state,
|
|
|
|
|
.port_get_cmode = mv88e6352_port_get_cmode,
|
|
|
|
|
.stats_snapshot = mv88e6390_g1_stats_snapshot,
|
|
|
|
|
.stats_set_histogram = mv88e6390_g1_stats_set_histogram,
|
|
|
|
|
.stats_get_sset_count = mv88e6320_stats_get_sset_count,
|
|
|
|
|