gpio/omap: cleanup prepare_for_idle and resume_after_idle
Since *_prepare_for_idle() and *_resume_after_idle() are called with interrupts disabled they should be kept as simple as possible. So, moving most of the stuff to *_runtime_suspend/resume() callbacks. To avoid invalid context restore happening in *_runtime_resume() callback as a result of *_get_sync() call in *_gpio_probe(), update bank->context_loss_count. This would make context restore condition check false in the callback and skip restore until further initialization take place. The workaround_enabled static variable is now a member of struct gpio_bank. Unlike most GPIO registers the OE has 0xffffffff as the default value. To make sure invalid context is not restored, updating the OE context with default value. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>hifive-unleashed-5.1
Tarun Kanti DebBarma
parent
065cd795d2
commit
2dc983c565
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@ -29,6 +29,8 @@
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#include <asm/gpio.h>
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#include <asm/mach/irq.h>
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#define OFF_MODE 1
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static LIST_HEAD(omap_gpio_list);
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struct gpio_regs {
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@ -73,6 +75,8 @@ struct gpio_bank {
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u32 width;
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int context_loss_count;
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u16 id;
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int power_mode;
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bool workaround_enabled;
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void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
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int (*get_context_loss_count)(struct device *dev);
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@ -905,6 +909,8 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
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if (bank->regs->debounce_en)
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_gpio_rmw(base, bank->regs->debounce_en, 0, 1);
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/* Save OE default value (0xffffffff) in the context */
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bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
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/* Initialize interface clk ungated, module enabled */
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if (bank->regs->ctrl)
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_gpio_rmw(base, bank->regs->ctrl, 0, 1);
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@ -1127,55 +1133,158 @@ static int omap_gpio_resume(struct device *dev)
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}
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#endif /* CONFIG_PM_SLEEP */
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#if defined(CONFIG_PM_RUNTIME)
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static void omap_gpio_save_context(struct gpio_bank *bank);
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static void omap_gpio_restore_context(struct gpio_bank *bank);
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void omap2_gpio_prepare_for_idle(int off_mode)
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static int omap_gpio_runtime_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct gpio_bank *bank = platform_get_drvdata(pdev);
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u32 l1 = 0, l2 = 0;
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unsigned long flags;
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spin_lock_irqsave(&bank->lock, flags);
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if (bank->power_mode != OFF_MODE) {
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bank->power_mode = 0;
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goto save_gpio_context;
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}
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/*
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* If going to OFF, remove triggering for all
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* non-wakeup GPIOs. Otherwise spurious IRQs will be
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* generated. See OMAP2420 Errata item 1.101.
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*/
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if (!(bank->enabled_non_wakeup_gpios))
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goto save_gpio_context;
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bank->saved_datain = __raw_readl(bank->base +
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bank->regs->datain);
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l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
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l2 = __raw_readl(bank->base + bank->regs->risingdetect);
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bank->saved_fallingdetect = l1;
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bank->saved_risingdetect = l2;
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l1 &= ~bank->enabled_non_wakeup_gpios;
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l2 &= ~bank->enabled_non_wakeup_gpios;
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__raw_writel(l1, bank->base + bank->regs->fallingdetect);
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__raw_writel(l2, bank->base + bank->regs->risingdetect);
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bank->workaround_enabled = true;
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save_gpio_context:
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if (bank->get_context_loss_count)
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bank->context_loss_count =
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bank->get_context_loss_count(bank->dev);
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omap_gpio_save_context(bank);
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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}
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static int omap_gpio_runtime_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct gpio_bank *bank = platform_get_drvdata(pdev);
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int context_lost_cnt_after;
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u32 l = 0, gen, gen0, gen1;
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unsigned long flags;
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spin_lock_irqsave(&bank->lock, flags);
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if (!bank->enabled_non_wakeup_gpios || !bank->workaround_enabled) {
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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}
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if (bank->get_context_loss_count) {
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context_lost_cnt_after =
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bank->get_context_loss_count(bank->dev);
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if (context_lost_cnt_after != bank->context_loss_count ||
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!context_lost_cnt_after) {
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omap_gpio_restore_context(bank);
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} else {
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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}
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}
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__raw_writel(bank->saved_fallingdetect,
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bank->base + bank->regs->fallingdetect);
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__raw_writel(bank->saved_risingdetect,
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bank->base + bank->regs->risingdetect);
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l = __raw_readl(bank->base + bank->regs->datain);
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/*
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* Check if any of the non-wakeup interrupt GPIOs have changed
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* state. If so, generate an IRQ by software. This is
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* horribly racy, but it's the best we can do to work around
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* this silicon bug.
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*/
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l ^= bank->saved_datain;
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l &= bank->enabled_non_wakeup_gpios;
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/*
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* No need to generate IRQs for the rising edge for gpio IRQs
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* configured with falling edge only; and vice versa.
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*/
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gen0 = l & bank->saved_fallingdetect;
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gen0 &= bank->saved_datain;
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gen1 = l & bank->saved_risingdetect;
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gen1 &= ~(bank->saved_datain);
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/* FIXME: Consider GPIO IRQs with level detections properly! */
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gen = l & (~(bank->saved_fallingdetect) & ~(bank->saved_risingdetect));
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/* Consider all GPIO IRQs needed to be updated */
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gen |= gen0 | gen1;
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if (gen) {
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u32 old0, old1;
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old0 = __raw_readl(bank->base + bank->regs->leveldetect0);
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old1 = __raw_readl(bank->base + bank->regs->leveldetect1);
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if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
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__raw_writel(old0 | gen, bank->base +
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bank->regs->leveldetect0);
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__raw_writel(old1 | gen, bank->base +
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bank->regs->leveldetect1);
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}
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if (cpu_is_omap44xx()) {
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__raw_writel(old0 | l, bank->base +
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bank->regs->leveldetect0);
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__raw_writel(old1 | l, bank->base +
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bank->regs->leveldetect1);
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}
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__raw_writel(old0, bank->base + bank->regs->leveldetect0);
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__raw_writel(old1, bank->base + bank->regs->leveldetect1);
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}
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bank->workaround_enabled = false;
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spin_unlock_irqrestore(&bank->lock, flags);
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return 0;
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}
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#endif /* CONFIG_PM_RUNTIME */
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void omap2_gpio_prepare_for_idle(int pwr_mode)
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{
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struct gpio_bank *bank;
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list_for_each_entry(bank, &omap_gpio_list, node) {
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u32 l1 = 0, l2 = 0;
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int j;
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if (!bank->loses_context)
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if (!bank->mod_usage || !bank->loses_context)
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continue;
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bank->power_mode = pwr_mode;
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for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
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clk_disable(bank->dbck);
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if (!off_mode)
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continue;
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/* If going to OFF, remove triggering for all
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* non-wakeup GPIOs. Otherwise spurious IRQs will be
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* generated. See OMAP2420 Errata item 1.101. */
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if (!(bank->enabled_non_wakeup_gpios))
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goto save_gpio_context;
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bank->saved_datain = __raw_readl(bank->base +
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bank->regs->datain);
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l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
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l2 = __raw_readl(bank->base + bank->regs->risingdetect);
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bank->saved_fallingdetect = l1;
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bank->saved_risingdetect = l2;
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l1 &= ~bank->enabled_non_wakeup_gpios;
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l2 &= ~bank->enabled_non_wakeup_gpios;
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__raw_writel(l1, bank->base + bank->regs->fallingdetect);
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__raw_writel(l2, bank->base + bank->regs->risingdetect);
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save_gpio_context:
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if (bank->get_context_loss_count)
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bank->context_loss_count =
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bank->get_context_loss_count(bank->dev);
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omap_gpio_save_context(bank);
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if (!pm_runtime_suspended(bank->dev))
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pm_runtime_put(bank->dev);
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pm_runtime_put_sync_suspend(bank->dev);
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}
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}
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@ -1184,84 +1293,19 @@ void omap2_gpio_resume_after_idle(void)
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struct gpio_bank *bank;
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list_for_each_entry(bank, &omap_gpio_list, node) {
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int context_lost_cnt_after;
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u32 l = 0, gen, gen0, gen1;
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int j;
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if (!bank->loses_context)
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if (!bank->mod_usage || !bank->loses_context)
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continue;
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for (j = 0; j < hweight_long(bank->dbck_enable_mask); j++)
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clk_enable(bank->dbck);
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if (pm_runtime_suspended(bank->dev))
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pm_runtime_get_sync(bank->dev);
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if (bank->get_context_loss_count) {
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context_lost_cnt_after =
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bank->get_context_loss_count(bank->dev);
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if (context_lost_cnt_after != bank->context_loss_count
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|| !context_lost_cnt_after)
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omap_gpio_restore_context(bank);
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}
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if (!(bank->enabled_non_wakeup_gpios))
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continue;
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__raw_writel(bank->saved_fallingdetect,
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bank->base + bank->regs->fallingdetect);
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__raw_writel(bank->saved_risingdetect,
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bank->base + bank->regs->risingdetect);
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l = __raw_readl(bank->base + bank->regs->datain);
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/* Check if any of the non-wakeup interrupt GPIOs have changed
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* state. If so, generate an IRQ by software. This is
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* horribly racy, but it's the best we can do to work around
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* this silicon bug. */
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l ^= bank->saved_datain;
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l &= bank->enabled_non_wakeup_gpios;
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/*
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* No need to generate IRQs for the rising edge for gpio IRQs
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* configured with falling edge only; and vice versa.
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*/
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gen0 = l & bank->saved_fallingdetect;
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gen0 &= bank->saved_datain;
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gen1 = l & bank->saved_risingdetect;
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gen1 &= ~(bank->saved_datain);
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/* FIXME: Consider GPIO IRQs with level detections properly! */
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gen = l & (~(bank->saved_fallingdetect) &
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~(bank->saved_risingdetect));
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/* Consider all GPIO IRQs needed to be updated */
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gen |= gen0 | gen1;
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if (gen) {
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u32 old0, old1;
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old0 = __raw_readl(bank->base +
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bank->regs->leveldetect0);
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old1 = __raw_readl(bank->base +
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bank->regs->leveldetect1);
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if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
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old0 |= gen;
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old1 |= gen;
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}
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if (cpu_is_omap44xx()) {
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old0 |= l;
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old1 |= l;
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}
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__raw_writel(old0, bank->base +
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bank->regs->leveldetect0);
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__raw_writel(old1, bank->base +
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bank->regs->leveldetect1);
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}
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pm_runtime_get_sync(bank->dev);
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}
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}
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#if defined(CONFIG_PM_RUNTIME)
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static void omap_gpio_save_context(struct gpio_bank *bank)
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{
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bank->context.irqenable1 =
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@ -1303,13 +1347,18 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)
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bank->base + bank->regs->fallingdetect);
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__raw_writel(bank->context.dataout, bank->base + bank->regs->dataout);
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}
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#endif /* CONFIG_PM_RUNTIME */
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#else
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#define omap_gpio_suspend NULL
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#define omap_gpio_resume NULL
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#define omap_gpio_runtime_suspend NULL
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#define omap_gpio_runtime_resume NULL
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#endif
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static const struct dev_pm_ops gpio_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume)
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SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,
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NULL)
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};
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static struct platform_driver omap_gpio_driver = {
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