- add HDMI related nodes to mt8173
- enable the HDMI output on mt8173-evb -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJX1ssKAAoJELQ5Ylss8dND95sQAJgirPzd8k4VSQ8V6YYf9Ulr B3C/hy7gSZwwUlJ5kTh7Dp6IGqZqSdPcsj2kA6UYkJVRJHJ2Ji3kAqxEJGIZVBZL 0XowoPnOztFaW0TrHeoDHBH8Ly8gT71VS9YRNqvHWzLR6XBj4qBP4CJzbvoeHriw 9IiXq0MZ3/ii8RQ8pMSQFCE3kBfl9bL2YXIlnCC4jOA5892/kqETkLT1THyUDSTf PIAPYa1iIp/8GqM3BiJtji2bSc7aYEpRKiEtAziv5JAb4Ltbq75u+9YOOH8CU5BR maB/freg4UCLNl6jOiFxsBVPpdoUxHftcus67Q454ZKznKCgM3KDt/achNcV3BTU 6Wj9oXGFVU/luKGVfYpyd2qD/7+ajmGlh0PRrag5AZ9+A/2a0LYvrYqHfedGwQU/ qEQwRKxo6pphUxoWnXrx29A+H+V2w2coXI5FRa7JBpWkUR8UNyxuR+la2f5hWsOq N3mVc7idtoEvKGpdEd8NQ41Vj0GYfs9RxkARbwdLl+OI7v4SDEuB4bBaVh8WRrCR BCyy7LukSBMiivrCWCBScUa7i8Lo2o3tB7vq4cEr2emnX74LGFKr/TSFsvK8xS5I QNkgdWIERir0dTyNWjWAqRq+WWMINgQZizbSvJ05L2nqZlxN2r9UeY6um9JlQKD8 LwCfHWMB9jNg7o3+XXyc =cx5v -----END PGP SIGNATURE----- Merge tag 'v4.8-next-dts64' of https://github.com/mbgg/linux-mediatek into next/dt64 Pull "ARM: mediatek: dts64 updates for v4.9" from Matthias Brugger: - add HDMI related nodes to mt8173 - enable the HDMI output on mt8173-evb * tag 'v4.8-next-dts64' of https://github.com/mbgg/linux-mediatek: arm64: dts: mt8173-evb: enable HDMI output arm64: dts: mt8173: Add HDMI related nodes
This commit is contained in:
commit
2e1762c30f
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@ -42,6 +42,44 @@
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gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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connector {
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compatible = "hdmi-connector";
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label = "hdmi";
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type = "d";
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&hdmi0_out>;
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};
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};
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};
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};
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&cec {
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status = "okay";
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};
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&dpi0 {
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status = "okay";
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};
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&hdmi_phy {
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status = "okay";
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};
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&hdmi0 {
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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hdmi0_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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&i2c1 {
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@ -254,6 +254,16 @@
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<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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hdmi_pin: xxx {
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/*hdmi htplg pin*/
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pins1 {
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pinmux = <MT8173_PIN_21_HTPLG__FUNC_HTPLG>;
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input-enable;
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bias-pull-down;
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};
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};
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i2c0_pins_a: i2c0 {
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pins1 {
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pinmux = <MT8173_PIN_45_SDA0__FUNC_SDA0>,
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@ -341,6 +351,14 @@
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clock-names = "spi", "wrap";
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};
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cec: cec@10013000 {
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compatible = "mediatek,mt8173-cec";
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reg = <0 0x10013000 0 0xbc>;
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interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&infracfg CLK_INFRA_CEC>;
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status = "disabled";
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};
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vpu: vpu@10020000 {
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compatible = "mediatek,mt8173-vpu";
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reg = <0 0x10020000 0 0x30000>,
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@ -383,6 +401,19 @@
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#clock-cells = <1>;
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};
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hdmi_phy: hdmi-phy@10209100 {
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compatible = "mediatek,mt8173-hdmi-phy";
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reg = <0 0x10209100 0 0x24>;
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clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
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clock-names = "pll_ref";
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clock-output-names = "hdmitx_dig_cts";
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mediatek,ibias = <0xa>;
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mediatek,ibias_up = <0x1c>;
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#clock-cells = <0>;
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#phy-cells = <0>;
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status = "disabled";
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};
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mipi_tx0: mipi-dphy@10215000 {
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compatible = "mediatek,mt8173-mipi-tx";
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reg = <0 0x10215000 0 0x1000>;
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@ -577,6 +608,14 @@
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status = "disabled";
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};
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hdmiddc0: i2c@11012000 {
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compatible = "mediatek,mt8173-hdmi-ddc";
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
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reg = <0 0x11012000 0 0x1C>;
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clocks = <&pericfg CLK_PERI_I2C5>;
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clock-names = "ddc-i2c";
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};
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i2c6: i2c@11013000 {
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compatible = "mediatek,mt8173-i2c";
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reg = <0 0x11013000 0 0x70>,
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@ -885,6 +924,12 @@
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<&apmixedsys CLK_APMIXED_TVDPLL>;
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clock-names = "pixel", "engine", "pll";
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status = "disabled";
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port {
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dpi0_out: endpoint {
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remote-endpoint = <&hdmi0_in>;
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};
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};
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};
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pwm0: pwm@1401e000 {
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@ -942,6 +987,38 @@
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clocks = <&mmsys CLK_MM_DISP_OD>;
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};
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hdmi0: hdmi@14025000 {
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compatible = "mediatek,mt8173-hdmi";
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reg = <0 0x14025000 0 0x400>;
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interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
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<&mmsys CLK_MM_HDMI_PLLCK>,
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<&mmsys CLK_MM_HDMI_AUDIO>,
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<&mmsys CLK_MM_HDMI_SPDIF>;
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clock-names = "pixel", "pll", "bclk", "spdif";
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_pin>;
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phys = <&hdmi_phy>;
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phy-names = "hdmi";
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mediatek,syscon-hdmi = <&mmsys 0x900>;
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assigned-clocks = <&topckgen CLK_TOP_HDMI_SEL>;
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assigned-clock-parents = <&hdmi_phy>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hdmi0_in: endpoint {
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remote-endpoint = <&dpi0_out>;
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};
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};
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};
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};
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larb4: larb@14027000 {
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compatible = "mediatek,mt8173-smi-larb";
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reg = <0 0x14027000 0 0x1000>;
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