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drm/amd/display: change non_dpm0 state's default SR latency 

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Charlene Liu 2017-07-11 13:40:52 -04:00 committed by Alex Deucher
parent 7b0c470fcb
commit 2ebad8eb19
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
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@ -37,8 +37,8 @@
/* Defaults from spreadsheet rev#247 */
const struct dcn_soc_bounding_box dcn10_soc_defaults = {
/* latencies */
.sr_exit_time = 17, /*us*/
.sr_enter_plus_exit_time = 19, /*us*/
.sr_exit_time = 13, /*us*/
.sr_enter_plus_exit_time = 15, /*us*/
.urgent_latency = 4, /*us*/
.dram_clock_change_latency = 17, /*us*/
.write_back_latency = 12, /*us*/