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ARC: [mm] Assume pagecache page dirty by default 

Similar to ARM/SH

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
hifive-unleashed-5.1
Vineet Gupta 2013-05-13 17:23:58 +05:30
parent fedf5b9baf
commit 2ed21dae02
3 changed files with 14 additions and 7 deletions
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7
arch/arc/include/asm/cacheflush.h
View File

@ -80,6 +80,13 @@ void flush_anon_page(struct vm_area_struct *vma,
#endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */
/*
* A new pagecache page has PG_arch_1 clear - thus dcache dirty by default
* This works around some PIO based drivers which don't call flush_dcache_page
* to record that they dirtied the dcache
*/
#define PG_dc_clean PG_arch_1
/*
* Simple wrapper over config option
* Bootup code ensures that hardware matches kernel configuration

12
arch/arc/mm/cache_arc700.c
View File

@ -512,7 +512,7 @@ void flush_dcache_page(struct page *page)
struct address_space *mapping;
if (!cache_is_vipt_aliasing()) {
set_bit(PG_arch_1, &page->flags);
clear_bit(PG_dc_clean, &page->flags);
return;
}
@ -526,7 +526,7 @@ void flush_dcache_page(struct page *page)
* Make a note that K-mapping is dirty
*/
if (!mapping_mapped(mapping)) {
set_bit(PG_arch_1, &page->flags);
clear_bit(PG_dc_clean, &page->flags);
} else if (page_mapped(page)) {
/* kernel reading from page with U-mapping */
@ -734,7 +734,7 @@ void copy_user_highpage(struct page *to, struct page *from,
* non copied user pages (e.g. read faults which wire in pagecache page
* directly).
*/
set_bit(PG_arch_1, &to->flags);
clear_bit(PG_dc_clean, &to->flags);
/*
* if SRC was already usermapped and non-congruent to kernel mapping
@ -742,16 +742,16 @@ void copy_user_highpage(struct page *to, struct page *from,
*/
if (clean_src_k_mappings) {
__flush_dcache_page(kfrom, kfrom);
clear_bit(PG_arch_1, &from->flags);
set_bit(PG_dc_clean, &from->flags);
} else {
set_bit(PG_arch_1, &from->flags);
clear_bit(PG_dc_clean, &from->flags);
}
}
void clear_user_page(void *to, unsigned long u_vaddr, struct page *page)
{
clear_page(to);
set_bit(PG_arch_1, &page->flags);
clear_bit(PG_dc_clean, &page->flags);
}

2
arch/arc/mm/tlb.c
View File

@ -453,7 +453,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned,
if ((vma->vm_flags & VM_EXEC) ||
addr_not_cache_congruent(paddr, vaddr)) {
int dirty = test_and_clear_bit(PG_arch_1, &page->flags);
int dirty = !test_and_set_bit(PG_dc_clean, &page->flags);
if (dirty) {
/* wback + inv dcache lines */
__flush_dcache_page(paddr, paddr);