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drm/radeon: Handle PPLL0 powerdown on DCE8

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Only Bonaire has PPLL0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-02-05 11:58:11 -05:00
parent 0331f6749e
commit 2f0047b2ba
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/radeon/atombios_crtc.c
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@ -1931,7 +1931,7 @@ static void atombios_crtc_disable(struct drm_crtc *crtc)
break;
case ATOM_PPLL0:
/* disable the ppll */
if (ASIC_IS_DCE61(rdev))
if ((rdev->family == CHIP_ARUBA) || (rdev->family == CHIP_BONAIRE))
atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
0, 0, ATOM_DISABLE, 0, 0, 0, 0, 0, false, &ss);
break;