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ASoC: wm8961 - clear WM8961_MCLKDIV bit for freq <= 16500000

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MCLKDIV bit of Register 04h Clocking1:
	0 : Divide by 1
	1 : Divide by 2

Thus in the case of freq <= 16500000, we should clear MCLKDIV bit.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
This commit is contained in:
Axel Lin 2010-11-24 10:21:54 +08:00 committed by Mark Brown
parent 08b1a38465
commit 2f7dceeda4
1 changed files with 1 additions and 1 deletions
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2
sound/soc/codecs/wm8961.c
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@ -736,7 +736,7 @@ static int wm8961_set_sysclk(struct snd_soc_dai *dai, int clk_id,
freq /= 2;
} else {
dev_dbg(codec->dev, "Using MCLK/1 for %dHz MCLK\n", freq);
reg &= WM8961_MCLKDIV;
reg &= ~WM8961_MCLKDIV;
}
snd_soc_write(codec, WM8961_CLOCKING1, reg);