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drm/nouveau: deprecate pci_get_bus_and_slot() 

pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
where a PCI device is present. This restricts the device drivers to be
reused for other domain numbers.

Getting ready to remove pci_get_bus_and_slot() function in favor of
pci_get_domain_bus_and_slot().

Replace pci_get_bus_and_slot() with pci_get_domain_bus_and_slot()
and extract the domain number from
1. struct pci_dev
2. struct pci_dev through drm_device->pdev
3. struct pci_dev through fb->subdev->drm_device->pdev

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
hifive-unleashed-5.1
Sinan Kaya 2017-12-19 00:37:45 -05:00 committed by Bjorn Helgaas
parent ba99d83488
commit 2fa6d6cdaf
4 changed files with 21 additions and 6 deletions
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4
drivers/gpu/drm/nouveau/dispnv04/arb.c
View File

@ -213,8 +213,10 @@ nv04_update_arb(struct drm_device *dev, int VClk, int bpp,
if ((dev->pdev->device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ ||
(dev->pdev->device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) {
uint32_t type;
int domain = pci_domain_nr(dev->pdev->bus);
pci_read_config_dword(pci_get_bus_and_slot(0, 1), 0x7c, &type);
pci_read_config_dword(pci_get_domain_bus_and_slot(domain, 0, 1),
0x7c, &type);
sim_data.memory_type = (type >> 12) & 1;
sim_data.memory_width = 64;

10
drivers/gpu/drm/nouveau/dispnv04/hw.c
View File

@ -216,12 +216,15 @@ nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
{
struct nvkm_pll_vals pllvals;
int ret;
int domain;
domain = pci_domain_nr(dev->pdev->bus);
if (plltype == PLL_MEMORY &&
(dev->pdev->device & 0x0ff0) == CHIPSET_NFORCE) {
uint32_t mpllP;
pci_read_config_dword(pci_get_bus_and_slot(0, 3), 0x6c, &mpllP);
pci_read_config_dword(pci_get_domain_bus_and_slot(domain, 0, 3),
0x6c, &mpllP);
mpllP = (mpllP >> 8) & 0xf;
if (!mpllP)
mpllP = 4;
@ -232,7 +235,8 @@ nouveau_hw_get_clock(struct drm_device *dev, enum nvbios_pll_type plltype)
(dev->pdev->device & 0xff0) == CHIPSET_NFORCE2) {
uint32_t clock;
pci_read_config_dword(pci_get_bus_and_slot(0, 5), 0x4c, &clock);
pci_read_config_dword(pci_get_domain_bus_and_slot(domain, 0, 5),
0x4c, &clock);
return clock / 1000;
}

3
drivers/gpu/drm/nouveau/nouveau_drm.c
View File

@ -524,7 +524,8 @@ nouveau_get_hdmi_dev(struct nouveau_drm *drm)
}
/* subfunction one is a hdmi audio device? */
drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
drm->hdmi_device = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus),
(unsigned int)pdev->bus->number,
PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
if (!drm->hdmi_device) {

10
drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv1a.c
View File

@ -28,8 +28,16 @@ nv1a_ram_new(struct nvkm_fb *fb, struct nvkm_ram **pram)
{
struct pci_dev *bridge;
u32 mem, mib;
int domain = 0;
struct pci_dev *pdev = NULL;
bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 1));
if (dev_is_pci(fb->subdev.device->dev))
pdev = to_pci_dev(fb->subdev.device->dev);
if (pdev)
domain = pci_domain_nr(pdev->bus);
bridge = pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 1));
if (!bridge) {
nvkm_error(&fb->subdev, "no bridge device\n");
return -ENODEV;