redonkable/alistair23-linux
redonkable/alistair23-linux
1
0
Fork 0
Code Releases Activity

drm/i915: remove pch_port argument form intel_enable_pipe

Browse source 
Now that we pass struct intel_crtc as an argument, there's no need for
it.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Paulo Zanoni 2014-01-17 13:51:10 -02:00 committed by Daniel Vetter
parent 0372264a6d
commit 30421c4f40
1 changed files with 6 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
drivers/gpu/drm/i915/intel_display.c
View file

@ -1747,7 +1747,6 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
/**
* intel_enable_pipe - enable a pipe, asserting requirements
* @crtc: crtc responsible for the pipe
* @pch_port: on ILK+, is this pipe driving a PCH port or not
* @dsi: output type is DSI
* @wait_for_vblank: whether we should for a vblank or not after enabling it
*
@ -1755,7 +1754,7 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
* are met, if applicable, e.g. PLL enabled, LVDS pairs enabled, etc.
*/
static void intel_enable_pipe(struct intel_crtc *crtc,
bool pch_port, bool dsi, bool wait_for_vblank)
bool dsi, bool wait_for_vblank)
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
@ -1786,7 +1785,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc,
else
assert_pll_enabled(dev_priv, pipe);
else {
if (pch_port) {
if (crtc->config.has_pch_encoder) {
/* if driving the PCH, we need FDI enabled */
assert_fdi_rx_pll_enabled(dev_priv, pch_transcoder);
assert_fdi_tx_pll_enabled(dev_priv,
@ -3599,8 +3598,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
intel_crtc_load_lut(crtc);
intel_update_watermarks(crtc);
intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false,
true);
intel_enable_pipe(intel_crtc, false, true);
intel_enable_primary_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
intel_crtc_update_cursor(crtc, true);
@ -3745,8 +3743,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
intel_ddi_enable_transcoder_func(crtc);
intel_update_watermarks(crtc);
intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false,
false);
intel_enable_pipe(intel_crtc, false, false);
if (intel_crtc->config.has_pch_encoder)
lpt_pch_enable(crtc);
@ -4171,7 +4168,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
intel_crtc_load_lut(crtc);
intel_update_watermarks(crtc);
intel_enable_pipe(intel_crtc, false, is_dsi, true);
intel_enable_pipe(intel_crtc, is_dsi, true);
intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
intel_enable_primary_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
@ -4210,7 +4207,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
intel_crtc_load_lut(crtc);
intel_update_watermarks(crtc);
intel_enable_pipe(intel_crtc, false, false, true);
intel_enable_pipe(intel_crtc, false, true);
intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
intel_enable_primary_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);