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ARM: dts: imx6qp: add PRE nodes

Add the DT nodes for the Prefetch Resolve Engines found on i.MX6QP.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
hifive-unleashed-5.1
Lucas Stach 2017-03-23 15:13:12 +01:00 committed by Shawn Guo
parent 3e1b857786
commit 3062cf55e1
1 changed files with 38 additions and 0 deletions

View File

@ -55,6 +55,44 @@
reg = <0x00960000 0x20000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
aips-bus@02100000 {
pre1: pre@21c8000 {
compatible = "fsl,imx6qp-pre";
reg = <0x021c8000 0x1000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
clocks = <&clks IMX6QDL_CLK_PRE0>;
clock-names = "axi";
fsl,iram = <&ocram2>;
};
pre2: pre@21c9000 {
compatible = "fsl,imx6qp-pre";
reg = <0x021c9000 0x1000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
clocks = <&clks IMX6QDL_CLK_PRE1>;
clock-names = "axi";
fsl,iram = <&ocram2>;
};
pre3: pre@21ca000 {
compatible = "fsl,imx6qp-pre";
reg = <0x021ca000 0x1000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_EDGE_RISING>;
clocks = <&clks IMX6QDL_CLK_PRE2>;
clock-names = "axi";
fsl,iram = <&ocram3>;
};
pre4: pre@21cb000 {
compatible = "fsl,imx6qp-pre";
reg = <0x021cb000 0x1000>;
interrupts = <GIC_SPI 99 IRQ_TYPE_EDGE_RISING>;
clocks = <&clks IMX6QDL_CLK_PRE3>;
clock-names = "axi";
fsl,iram = <&ocram3>;
};
};
};
};