Blackfin arch: dont clear status register bits in SWRST so we can actually use it

Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Mike Frysinger 2007-05-21 18:09:23 +08:00 committed by Linus Torvalds
parent eb8d5f6c03
commit 30870b93cd
3 changed files with 0 additions and 18 deletions

View file

@ -468,12 +468,6 @@ ENTRY(_bfin_reset)
w[p0] = r0.l;
#endif
/* Clear the bits 13-15 in SWRST if they werent cleared */
p0.h = hi(SWRST);
p0.l = lo(SWRST);
csync;
r0.l = w[p0];
/* Clear the IMASK register */
p0.h = hi(IMASK);
p0.l = lo(IMASK);

View file

@ -504,12 +504,6 @@ _delay_lab1_end:
nop;
#endif
/* Clear the bits 13-15 in SWRST if they werent cleared */
p0.h = hi(SWRST);
p0.l = lo(SWRST);
csync;
r0.l = w[p0];
/* Clear the IMASK register */
p0.h = hi(IMASK);
p0.l = lo(IMASK);

View file

@ -414,12 +414,6 @@ ENTRY(_bfin_reset)
w[p0] = r0.l;
#endif
/* Clear the bits 13-15 in SWRST if they werent cleared */
p0.h = hi(SICA_SWRST);
p0.l = lo(SICA_SWRST);
csync;
r0.l = w[p0];
/* Clear the IMASK register */
p0.h = hi(IMASK);
p0.l = lo(IMASK);