1
0
Fork 0

riscv: Add HAVE_IRQ_TIME_ACCOUNTING

RISCV_TIMER/CLINT_TIMER is required for RISC-V system, and it
provides sched_clock, which allow us to enable IRQ_TIME_ACCOUNTING.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
zero-sugar-mainline-defconfig
Kefeng Wang 2020-10-28 12:28:42 +08:00 committed by Palmer Dabbelt
parent da815582cf
commit 31564b8b6d
No known key found for this signature in database
GPG Key ID: 2E1319F35FBB1889
2 changed files with 2 additions and 1 deletions

View File

@ -23,7 +23,7 @@
| openrisc: | TODO |
| parisc: | .. |
| powerpc: | ok |
| riscv: | TODO |
| riscv: | ok |
| s390: | .. |
| sh: | TODO |
| sparc: | .. |

View File

@ -68,6 +68,7 @@ config RISCV
select HAVE_FUTEX_CMPXCHG if FUTEX
select HAVE_GCC_PLUGINS
select HAVE_GENERIC_VDSO if MMU && 64BIT
select HAVE_IRQ_TIME_ACCOUNTING
select HAVE_PCI
select HAVE_PERF_EVENTS
select HAVE_PERF_REGS