redonkable
/
alistair23-linux
1
0
Fork 0
Code Releases Activity

drm/i915: synchronize_irq() against the actual irq 

When eliminating our use of drm_irq_install() I failed to convert
all our synchronize_irq() calls to consult pdev->irq instead of
dev_priv->drm.irq. As we no longer populate dev_priv->drm.irq
we're no longer synchronizing against anything.

v2: Add intel_syncrhonize_irq() (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reported-by: Imre Deak <imre.deak@intel.com>
Fixes: b318b82455 ("drm/i915: Nuke drm_driver irq vfuncs")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111012
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190702151723.29739-1-ville.syrjala@linux.intel.com
alistair/sunxi64-5.4-dsi
Ville Syrjälä 2019-07-02 18:17:23 +03:00 committed by Chris Wilson
parent 096a93949b
commit 315ca4c408
7 changed files with 15 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/i915/display/intel_display_power.c
View File

@ -1158,7 +1158,7 @@ static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv)
spin_unlock_irq(&dev_priv->irq_lock);
/* make sure we're done processing display irqs */
synchronize_irq(dev_priv->drm.irq);
intel_synchronize_irq(dev_priv);
intel_power_sequencer_reset(dev_priv);

2
drivers/gpu/drm/i915/display/intel_pipe_crc.c
View File

@ -667,5 +667,5 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *intel_crtc)
I915_WRITE(PIPE_CRC_CTL(crtc->index), 0);
POSTING_READ(PIPE_CRC_CTL(crtc->index));
synchronize_irq(dev_priv->drm.irq);
intel_synchronize_irq(dev_priv);
}

2
drivers/gpu/drm/i915/gt/intel_engine_cs.c
View File

@ -1162,7 +1162,7 @@ bool intel_engine_is_idle(struct intel_engine_cs *engine)
if (execlists_active(&engine->execlists)) {
struct tasklet_struct *t = &engine->execlists.tasklet;
synchronize_hardirq(engine->i915->drm.irq);
synchronize_hardirq(engine->i915->drm.pdev->irq);
local_bh_disable();
if (tasklet_trylock(t)) {

2
drivers/gpu/drm/i915/i915_debugfs.c
View File

@ -4081,7 +4081,7 @@ static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
/* Synchronize with everything first in case there's been an HPD
* storm, but we haven't finished handling it in the kernel yet
*/
synchronize_irq(dev_priv->drm.irq);
intel_synchronize_irq(dev_priv);
flush_work(&dev_priv->hotplug.dig_port_work);
flush_work(&dev_priv->hotplug.hotplug_work);

10
drivers/gpu/drm/i915/i915_irq.c
View File

@ -580,7 +580,7 @@ void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv)
gen6_disable_pm_irq(dev_priv, GEN6_PM_RPS_EVENTS);
spin_unlock_irq(&dev_priv->irq_lock);
synchronize_irq(dev_priv->drm.irq);
intel_synchronize_irq(dev_priv);
/* Now that we will not be generating any more work, flush any
* outstanding tasks. As we are called on the RPS idle path,
@ -627,7 +627,7 @@ void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv)
gen6_disable_pm_irq(dev_priv, dev_priv->pm_guc_events);
spin_unlock_irq(&dev_priv->irq_lock);
synchronize_irq(dev_priv->drm.irq);
intel_synchronize_irq(dev_priv);
gen9_reset_guc_interrupts(dev_priv);
}
@ -663,7 +663,7 @@ void gen11_disable_guc_interrupts(struct drm_i915_private *dev_priv)
I915_WRITE(GEN11_GUC_SG_INTR_ENABLE, 0);
spin_unlock_irq(&dev_priv->irq_lock);
synchronize_irq(dev_priv->drm.irq);
intel_synchronize_irq(dev_priv);
gen11_reset_guc_interrupts(dev_priv);
}
@ -3680,7 +3680,7 @@ void gen8_irq_power_well_pre_disable(struct drm_i915_private *dev_priv,
spin_unlock_irq(&dev_priv->irq_lock);
/* make sure we're done processing display irqs */
synchronize_irq(dev_priv->drm.irq);
intel_synchronize_irq(dev_priv);
}
static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
@ -4970,7 +4970,7 @@ void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv)
{
intel_irq_reset(dev_priv);
dev_priv->runtime_pm.irqs_enabled = false;
synchronize_irq(dev_priv->drm.irq);
intel_synchronize_irq(dev_priv);
}
/**

5
drivers/gpu/drm/i915/i915_irq.h
View File

@ -102,6 +102,11 @@ static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv)
return dev_priv->runtime_pm.irqs_enabled;
}
static inline void intel_synchronize_irq(struct drm_i915_private *i915)
{
synchronize_irq(i915->drm.pdev->irq);
}
int intel_get_crtc_scanline(struct intel_crtc *crtc);
void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
u8 pipe_mask);

2
drivers/gpu/drm/i915/intel_guc_log.c
View File

@ -615,7 +615,7 @@ void intel_guc_log_relay_close(struct intel_guc_log *log)
struct drm_i915_private *i915 = guc_to_i915(guc);
guc_log_disable_flush_events(log);
synchronize_irq(i915->drm.irq);
intel_synchronize_irq(i915);
flush_work(&log->relay.flush_work);