drm/i915/icl: Gate clocks for DSI
As per BSPEC, depending on the DSI transcoder being used, DDI clock for the associated port should be gated. This patch does the same. Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/e032bc3d8fff91b8c2631c73121268214615a7e8.1543500286.git.jani.nikula@intel.com
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@ -536,6 +536,23 @@ static void gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder)
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}
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}
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static void gen11_dsi_gate_clocks(struct intel_encoder *encoder)
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
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u32 tmp;
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enum port port;
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mutex_lock(&dev_priv->dpll_lock);
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tmp = I915_READ(DPCLKA_CFGCR0_ICL);
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for_each_dsi_port(port, intel_dsi->ports) {
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tmp |= DPCLKA_CFGCR0_DDI_CLK_OFF(port);
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}
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I915_WRITE(DPCLKA_CFGCR0_ICL, tmp);
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mutex_unlock(&dev_priv->dpll_lock);
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}
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static void
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gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
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const struct intel_crtc_state *pipe_config)
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@ -883,6 +900,9 @@ gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder,
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/* Step (4h, 4i, 4j, 4k): Configure transcoder */
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gen11_dsi_configure_transcoder(encoder, pipe_config);
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/* Step 4l: Gate DDI clocks */
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gen11_dsi_gate_clocks(encoder);
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}
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static void gen11_dsi_powerup_panel(struct intel_encoder *encoder)
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