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ASoC: Mediatek: MT8183: enable IIR filter 

IIR fileter can remove DC offset. It must be enabled when
dmic or amic connected to pmic is used.

Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
alistair/sunxi64-5.4-dsi
Shunli Wang 2019-05-20 16:24:20 +08:00 committed by Mark Brown
parent b0a821daf0
commit 326b181763
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GPG Key ID: 24D68B725D5487D0
1 changed files with 11 additions and 3 deletions
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14
sound/soc/mediatek/mt8183/mt8183-dai-adda.c
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@ -176,9 +176,6 @@ static int mtk_adda_ul_event(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_POST_PMD:
/* should delayed 1/fs(smallest is 8k) = 125us before afe off */
usleep_range(125, 135);
/* reset dmic */
afe_priv->mtkaif_dmic = 0;
break;
default:
break;
@ -426,6 +423,17 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream,
ul_src_con0 |= (voice_mode << 17) & (0x7 << 17);
/* enable iir */
ul_src_con0 |= (1 << UL_IIR_ON_TMP_CTL_SFT) &
UL_IIR_ON_TMP_CTL_MASK_SFT;
/* 35Hz @ 48k */
regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_02_01, 0x00000000);
regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_04_03, 0x00003FB8);
regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_06_05, 0x3FB80000);
regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_08_07, 0x3FB80000);
regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_10_09, 0x0000C048);
regmap_write(afe->regmap, AFE_ADDA_UL_SRC_CON0, ul_src_con0);
/* mtkaif_rxif_data_mode = 0, amic */