ptp: Added a clock driver for the IXP46x.
This patch adds a driver for the hardware time stamping unit found on the IXP465. The basic clock operations and an external trigger are implemented. Signed-off-by: Richard Cochran <richard.cochran@omicron.at> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: John Stultz <john.stultz@linaro.org> Acked-by: Krzysztof Halasa <khc@pm.waw.pl> Signed-off-by: John Stultz <john.stultz@linaro.org>hifive-unleashed-5.1
Richard Cochran
John Stultz
parent
c78275f366
commit
32bd93e8f9
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@ -0,0 +1,78 @@
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/*
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* PTP 1588 clock using the IXP46X
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*
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* Copyright (C) 2010 OMICRON electronics GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef _IXP46X_TS_H_
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#define _IXP46X_TS_H_
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#define DEFAULT_ADDEND 0xF0000029
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#define TICKS_NS_SHIFT 4
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struct ixp46x_channel_ctl {
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u32 ch_control; /* 0x40 Time Synchronization Channel Control */
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u32 ch_event; /* 0x44 Time Synchronization Channel Event */
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u32 tx_snap_lo; /* 0x48 Transmit Snapshot Low Register */
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u32 tx_snap_hi; /* 0x4C Transmit Snapshot High Register */
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u32 rx_snap_lo; /* 0x50 Receive Snapshot Low Register */
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u32 rx_snap_hi; /* 0x54 Receive Snapshot High Register */
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u32 src_uuid_lo; /* 0x58 Source UUID0 Low Register */
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u32 src_uuid_hi; /* 0x5C Sequence Identifier/Source UUID0 High */
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};
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struct ixp46x_ts_regs {
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u32 control; /* 0x00 Time Sync Control Register */
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u32 event; /* 0x04 Time Sync Event Register */
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u32 addend; /* 0x08 Time Sync Addend Register */
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u32 accum; /* 0x0C Time Sync Accumulator Register */
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u32 test; /* 0x10 Time Sync Test Register */
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u32 unused; /* 0x14 */
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u32 rsystime_lo; /* 0x18 RawSystemTime_Low Register */
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u32 rsystime_hi; /* 0x1C RawSystemTime_High Register */
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u32 systime_lo; /* 0x20 SystemTime_Low Register */
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u32 systime_hi; /* 0x24 SystemTime_High Register */
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u32 trgt_lo; /* 0x28 TargetTime_Low Register */
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u32 trgt_hi; /* 0x2C TargetTime_High Register */
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u32 asms_lo; /* 0x30 Auxiliary Slave Mode Snapshot Low */
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u32 asms_hi; /* 0x34 Auxiliary Slave Mode Snapshot High */
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u32 amms_lo; /* 0x38 Auxiliary Master Mode Snapshot Low */
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u32 amms_hi; /* 0x3C Auxiliary Master Mode Snapshot High */
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struct ixp46x_channel_ctl channel[3];
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};
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/* 0x00 Time Sync Control Register Bits */
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#define TSCR_AMM (1<<3)
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#define TSCR_ASM (1<<2)
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#define TSCR_TTM (1<<1)
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#define TSCR_RST (1<<0)
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/* 0x04 Time Sync Event Register Bits */
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#define TSER_SNM (1<<3)
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#define TSER_SNS (1<<2)
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#define TTIPEND (1<<1)
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/* 0x40 Time Synchronization Channel Control Register Bits */
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#define MASTER_MODE (1<<0)
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#define TIMESTAMP_ALL (1<<1)
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/* 0x44 Time Synchronization Channel Event Register Bits */
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#define TX_SNAPSHOT_LOCKED (1<<0)
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#define RX_SNAPSHOT_LOCKED (1<<1)
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#endif
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@ -30,9 +30,12 @@
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#include <linux/etherdevice.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/net_tstamp.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/ptp_classify.h>
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#include <linux/slab.h>
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#include <mach/ixp46x_ts.h>
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#include <mach/npe.h>
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#include <mach/qmgr.h>
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@ -67,6 +70,10 @@
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#define RXFREE_QUEUE(port_id) (NPE_ID(port_id) + 26)
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#define TXDONE_QUEUE 31
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#define PTP_SLAVE_MODE 1
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#define PTP_MASTER_MODE 2
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#define PORT2CHANNEL(p) NPE_ID(p->id)
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/* TX Control Registers */
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#define TX_CNTRL0_TX_EN 0x01
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#define TX_CNTRL0_HALFDUPLEX 0x02
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@ -171,6 +178,8 @@ struct port {
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int id; /* logical port ID */
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int speed, duplex;
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u8 firmware[4];
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int hwts_tx_en;
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int hwts_rx_en;
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};
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/* NPE message structure */
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@ -246,6 +255,172 @@ static int ports_open;
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static struct port *npe_port_tab[MAX_NPES];
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static struct dma_pool *dma_pool;
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static struct sock_filter ptp_filter[] = {
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PTP_FILTER
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};
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static int ixp_ptp_match(struct sk_buff *skb, u16 uid_hi, u32 uid_lo, u16 seqid)
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{
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u8 *data = skb->data;
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unsigned int offset;
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u16 *hi, *id;
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u32 lo;
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if (sk_run_filter(skb, ptp_filter) != PTP_CLASS_V1_IPV4)
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return 0;
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offset = ETH_HLEN + IPV4_HLEN(data) + UDP_HLEN;
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if (skb->len < offset + OFF_PTP_SEQUENCE_ID + sizeof(seqid))
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return 0;
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hi = (u16 *)(data + offset + OFF_PTP_SOURCE_UUID);
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id = (u16 *)(data + offset + OFF_PTP_SEQUENCE_ID);
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memcpy(&lo, &hi[1], sizeof(lo));
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return (uid_hi == ntohs(*hi) &&
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uid_lo == ntohl(lo) &&
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seqid == ntohs(*id));
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}
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static void ixp_rx_timestamp(struct port *port, struct sk_buff *skb)
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{
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struct skb_shared_hwtstamps *shhwtstamps;
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struct ixp46x_ts_regs *regs;
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u64 ns;
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u32 ch, hi, lo, val;
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u16 uid, seq;
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if (!port->hwts_rx_en)
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return;
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ch = PORT2CHANNEL(port);
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regs = (struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT;
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val = __raw_readl(®s->channel[ch].ch_event);
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if (!(val & RX_SNAPSHOT_LOCKED))
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return;
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lo = __raw_readl(®s->channel[ch].src_uuid_lo);
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hi = __raw_readl(®s->channel[ch].src_uuid_hi);
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uid = hi & 0xffff;
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seq = (hi >> 16) & 0xffff;
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if (!ixp_ptp_match(skb, htons(uid), htonl(lo), htons(seq)))
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goto out;
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lo = __raw_readl(®s->channel[ch].rx_snap_lo);
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hi = __raw_readl(®s->channel[ch].rx_snap_hi);
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ns = ((u64) hi) << 32;
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ns |= lo;
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ns <<= TICKS_NS_SHIFT;
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shhwtstamps = skb_hwtstamps(skb);
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memset(shhwtstamps, 0, sizeof(*shhwtstamps));
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shhwtstamps->hwtstamp = ns_to_ktime(ns);
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out:
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__raw_writel(RX_SNAPSHOT_LOCKED, ®s->channel[ch].ch_event);
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}
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static void ixp_tx_timestamp(struct port *port, struct sk_buff *skb)
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{
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struct skb_shared_hwtstamps shhwtstamps;
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struct ixp46x_ts_regs *regs;
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struct skb_shared_info *shtx;
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u64 ns;
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u32 ch, cnt, hi, lo, val;
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shtx = skb_shinfo(skb);
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if (unlikely(shtx->tx_flags & SKBTX_HW_TSTAMP && port->hwts_tx_en))
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shtx->tx_flags |= SKBTX_IN_PROGRESS;
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else
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return;
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ch = PORT2CHANNEL(port);
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regs = (struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT;
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/*
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* This really stinks, but we have to poll for the Tx time stamp.
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* Usually, the time stamp is ready after 4 to 6 microseconds.
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*/
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for (cnt = 0; cnt < 100; cnt++) {
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val = __raw_readl(®s->channel[ch].ch_event);
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if (val & TX_SNAPSHOT_LOCKED)
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break;
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udelay(1);
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}
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if (!(val & TX_SNAPSHOT_LOCKED)) {
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shtx->tx_flags &= ~SKBTX_IN_PROGRESS;
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return;
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}
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lo = __raw_readl(®s->channel[ch].tx_snap_lo);
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hi = __raw_readl(®s->channel[ch].tx_snap_hi);
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ns = ((u64) hi) << 32;
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ns |= lo;
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ns <<= TICKS_NS_SHIFT;
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memset(&shhwtstamps, 0, sizeof(shhwtstamps));
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shhwtstamps.hwtstamp = ns_to_ktime(ns);
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skb_tstamp_tx(skb, &shhwtstamps);
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__raw_writel(TX_SNAPSHOT_LOCKED, ®s->channel[ch].ch_event);
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}
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static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
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{
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struct hwtstamp_config cfg;
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struct ixp46x_ts_regs *regs;
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struct port *port = netdev_priv(netdev);
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int ch;
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if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
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return -EFAULT;
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if (cfg.flags) /* reserved for future extensions */
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return -EINVAL;
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ch = PORT2CHANNEL(port);
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regs = (struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT;
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switch (cfg.tx_type) {
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case HWTSTAMP_TX_OFF:
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port->hwts_tx_en = 0;
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break;
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case HWTSTAMP_TX_ON:
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port->hwts_tx_en = 1;
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break;
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default:
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return -ERANGE;
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}
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switch (cfg.rx_filter) {
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case HWTSTAMP_FILTER_NONE:
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port->hwts_rx_en = 0;
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break;
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case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
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port->hwts_rx_en = PTP_SLAVE_MODE;
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__raw_writel(0, ®s->channel[ch].ch_control);
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break;
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case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
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port->hwts_rx_en = PTP_MASTER_MODE;
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__raw_writel(MASTER_MODE, ®s->channel[ch].ch_control);
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break;
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default:
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return -ERANGE;
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}
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/* Clear out any old time stamps. */
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__raw_writel(TX_SNAPSHOT_LOCKED | RX_SNAPSHOT_LOCKED,
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®s->channel[ch].ch_event);
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return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
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}
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static int ixp4xx_mdio_cmd(struct mii_bus *bus, int phy_id, int location,
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int write, u16 cmd)
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@ -573,6 +748,7 @@ static int eth_poll(struct napi_struct *napi, int budget)
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debug_pkt(dev, "eth_poll", skb->data, skb->len);
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ixp_rx_timestamp(port, skb);
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skb->protocol = eth_type_trans(skb, dev);
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dev->stats.rx_packets++;
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dev->stats.rx_bytes += skb->len;
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@ -679,14 +855,12 @@ static int eth_xmit(struct sk_buff *skb, struct net_device *dev)
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return NETDEV_TX_OK;
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}
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memcpy_swab32(mem, (u32 *)((int)skb->data & ~3), bytes / 4);
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dev_kfree_skb(skb);
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#endif
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phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE);
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if (dma_mapping_error(&dev->dev, phys)) {
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#ifdef __ARMEB__
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dev_kfree_skb(skb);
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#else
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#ifndef __ARMEB__
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kfree(mem);
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#endif
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dev->stats.tx_dropped++;
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@ -728,6 +902,13 @@ static int eth_xmit(struct sk_buff *skb, struct net_device *dev)
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#if DEBUG_TX
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printk(KERN_DEBUG "%s: eth_xmit end\n", dev->name);
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#endif
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ixp_tx_timestamp(port, skb);
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skb_tx_timestamp(skb);
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#ifndef __ARMEB__
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dev_kfree_skb(skb);
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#endif
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return NETDEV_TX_OK;
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}
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@ -783,6 +964,9 @@ static int eth_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
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if (!netif_running(dev))
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return -EINVAL;
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if (cpu_is_ixp46x() && cmd == SIOCSHWTSTAMP)
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return hwtstamp_ioctl(dev, req, cmd);
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return phy_mii_ioctl(port->phydev, req, cmd);
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}
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@ -1171,6 +1355,11 @@ static int __devinit eth_init_one(struct platform_device *pdev)
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char phy_id[MII_BUS_ID_SIZE + 3];
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int err;
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if (ptp_filter_init(ptp_filter, ARRAY_SIZE(ptp_filter))) {
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pr_err("ixp4xx_eth: bad ptp filter\n");
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return -EINVAL;
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}
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if (!(dev = alloc_etherdev(sizeof(struct port))))
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return -ENOMEM;
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@ -40,4 +40,17 @@ config PTP_1588_CLOCK_GIANFAR
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To compile this driver as a module, choose M here: the module
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will be called gianfar_ptp.
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config PTP_1588_CLOCK_IXP46X
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tristate "Intel IXP46x as PTP clock"
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depends on PTP_1588_CLOCK
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depends on IXP4XX_ETH
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help
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This driver adds support for using the IXP46X as a PTP
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clock. This clock is only useful if your PTP programs are
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getting hardware time stamps on the PTP Ethernet packets
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using the SO_TIMESTAMPING API.
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To compile this driver as a module, choose M here: the module
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will be called ptp_ixp46x.
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endmenu
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@ -4,3 +4,4 @@
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ptp-y := ptp_clock.o ptp_chardev.o ptp_sysfs.o
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obj-$(CONFIG_PTP_1588_CLOCK) += ptp.o
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obj-$(CONFIG_PTP_1588_CLOCK_IXP46X) += ptp_ixp46x.o
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@ -0,0 +1,332 @@
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/*
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* PTP 1588 clock using the IXP46X
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*
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* Copyright (C) 2010 OMICRON electronics GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation; either version 2 of the License, or
|
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
|
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*
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* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/ptp_clock_kernel.h>
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#include <mach/ixp46x_ts.h>
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#define DRIVER "ptp_ixp46x"
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#define N_EXT_TS 2
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#define MASTER_GPIO 8
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#define MASTER_IRQ 25
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#define SLAVE_GPIO 7
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#define SLAVE_IRQ 24
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struct ixp_clock {
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struct ixp46x_ts_regs *regs;
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struct ptp_clock *ptp_clock;
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struct ptp_clock_info caps;
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int exts0_enabled;
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int exts1_enabled;
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};
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DEFINE_SPINLOCK(register_lock);
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/*
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* Register access functions
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*/
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static u64 ixp_systime_read(struct ixp46x_ts_regs *regs)
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{
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u64 ns;
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u32 lo, hi;
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lo = __raw_readl(®s->systime_lo);
|
||||
hi = __raw_readl(®s->systime_hi);
|
||||
|
||||
ns = ((u64) hi) << 32;
|
||||
ns |= lo;
|
||||
ns <<= TICKS_NS_SHIFT;
|
||||
|
||||
return ns;
|
||||
}
|
||||
|
||||
static void ixp_systime_write(struct ixp46x_ts_regs *regs, u64 ns)
|
||||
{
|
||||
u32 hi, lo;
|
||||
|
||||
ns >>= TICKS_NS_SHIFT;
|
||||
hi = ns >> 32;
|
||||
lo = ns & 0xffffffff;
|
||||
|
||||
__raw_writel(lo, ®s->systime_lo);
|
||||
__raw_writel(hi, ®s->systime_hi);
|
||||
}
|
||||
|
||||
/*
|
||||
* Interrupt service routine
|
||||
*/
|
||||
|
||||
static irqreturn_t isr(int irq, void *priv)
|
||||
{
|
||||
struct ixp_clock *ixp_clock = priv;
|
||||
struct ixp46x_ts_regs *regs = ixp_clock->regs;
|
||||
struct ptp_clock_event event;
|
||||
u32 ack = 0, lo, hi, val;
|
||||
|
||||
val = __raw_readl(®s->event);
|
||||
|
||||
if (val & TSER_SNS) {
|
||||
ack |= TSER_SNS;
|
||||
if (ixp_clock->exts0_enabled) {
|
||||
hi = __raw_readl(®s->asms_hi);
|
||||
lo = __raw_readl(®s->asms_lo);
|
||||
event.type = PTP_CLOCK_EXTTS;
|
||||
event.index = 0;
|
||||
event.timestamp = ((u64) hi) << 32;
|
||||
event.timestamp |= lo;
|
||||
event.timestamp <<= TICKS_NS_SHIFT;
|
||||
ptp_clock_event(ixp_clock->ptp_clock, &event);
|
||||
}
|
||||
}
|
||||
|
||||
if (val & TSER_SNM) {
|
||||
ack |= TSER_SNM;
|
||||
if (ixp_clock->exts1_enabled) {
|
||||
hi = __raw_readl(®s->amms_hi);
|
||||
lo = __raw_readl(®s->amms_lo);
|
||||
event.type = PTP_CLOCK_EXTTS;
|
||||
event.index = 1;
|
||||
event.timestamp = ((u64) hi) << 32;
|
||||
event.timestamp |= lo;
|
||||
event.timestamp <<= TICKS_NS_SHIFT;
|
||||
ptp_clock_event(ixp_clock->ptp_clock, &event);
|
||||
}
|
||||
}
|
||||
|
||||
if (val & TTIPEND)
|
||||
ack |= TTIPEND; /* this bit seems to be always set */
|
||||
|
||||
if (ack) {
|
||||
__raw_writel(ack, ®s->event);
|
||||
return IRQ_HANDLED;
|
||||
} else
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
/*
|
||||
* PTP clock operations
|
||||
*/
|
||||
|
||||
static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
|
||||
{
|
||||
u64 adj;
|
||||
u32 diff, addend;
|
||||
int neg_adj = 0;
|
||||
struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
|
||||
struct ixp46x_ts_regs *regs = ixp_clock->regs;
|
||||
|
||||
if (ppb < 0) {
|
||||
neg_adj = 1;
|
||||
ppb = -ppb;
|
||||
}
|
||||
addend = DEFAULT_ADDEND;
|
||||
adj = addend;
|
||||
adj *= ppb;
|
||||
diff = div_u64(adj, 1000000000ULL);
|
||||
|
||||
addend = neg_adj ? addend - diff : addend + diff;
|
||||
|
||||
__raw_writel(addend, ®s->addend);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ptp_ixp_adjtime(struct ptp_clock_info *ptp, s64 delta)
|
||||
{
|
||||
s64 now;
|
||||
unsigned long flags;
|
||||
struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
|
||||
struct ixp46x_ts_regs *regs = ixp_clock->regs;
|
||||
|
||||
spin_lock_irqsave(®ister_lock, flags);
|
||||
|
||||
now = ixp_systime_read(regs);
|
||||
now += delta;
|
||||
ixp_systime_write(regs, now);
|
||||
|
||||
spin_unlock_irqrestore(®ister_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ptp_ixp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
|
||||
{
|
||||
u64 ns;
|
||||
u32 remainder;
|
||||
unsigned long flags;
|
||||
struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
|
||||
struct ixp46x_ts_regs *regs = ixp_clock->regs;
|
||||
|
||||
spin_lock_irqsave(®ister_lock, flags);
|
||||
|
||||
ns = ixp_systime_read(regs);
|
||||
|
||||
spin_unlock_irqrestore(®ister_lock, flags);
|
||||
|
||||
ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
|
||||
ts->tv_nsec = remainder;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ptp_ixp_settime(struct ptp_clock_info *ptp,
|
||||
const struct timespec *ts)
|
||||
{
|
||||
u64 ns;
|
||||
unsigned long flags;
|
||||
struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
|
||||
struct ixp46x_ts_regs *regs = ixp_clock->regs;
|
||||
|
||||
ns = ts->tv_sec * 1000000000ULL;
|
||||
ns += ts->tv_nsec;
|
||||
|
||||
spin_lock_irqsave(®ister_lock, flags);
|
||||
|
||||
ixp_systime_write(regs, ns);
|
||||
|
||||
spin_unlock_irqrestore(®ister_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ptp_ixp_enable(struct ptp_clock_info *ptp,
|
||||
struct ptp_clock_request *rq, int on)
|
||||
{
|
||||
struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
|
||||
|
||||
switch (rq->type) {
|
||||
case PTP_CLK_REQ_EXTTS:
|
||||
switch (rq->extts.index) {
|
||||
case 0:
|
||||
ixp_clock->exts0_enabled = on ? 1 : 0;
|
||||
break;
|
||||
case 1:
|
||||
ixp_clock->exts1_enabled = on ? 1 : 0;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
return 0;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
static struct ptp_clock_info ptp_ixp_caps = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "IXP46X timer",
|
||||
.max_adj = 66666655,
|
||||
.n_ext_ts = N_EXT_TS,
|
||||
.pps = 0,
|
||||
.adjfreq = ptp_ixp_adjfreq,
|
||||
.adjtime = ptp_ixp_adjtime,
|
||||
.gettime = ptp_ixp_gettime,
|
||||
.settime = ptp_ixp_settime,
|
||||
.enable = ptp_ixp_enable,
|
||||
};
|
||||
|
||||
/* module operations */
|
||||
|
||||
static struct ixp_clock ixp_clock;
|
||||
|
||||
static int setup_interrupt(int gpio)
|
||||
{
|
||||
int irq;
|
||||
|
||||
gpio_line_config(gpio, IXP4XX_GPIO_IN);
|
||||
|
||||
irq = gpio_to_irq(gpio);
|
||||
|
||||
if (NO_IRQ == irq)
|
||||
return NO_IRQ;
|
||||
|
||||
if (irq_set_irq_type(irq, IRQF_TRIGGER_FALLING)) {
|
||||
pr_err("cannot set trigger type for irq %d\n", irq);
|
||||
return NO_IRQ;
|
||||
}
|
||||
|
||||
if (request_irq(irq, isr, 0, DRIVER, &ixp_clock)) {
|
||||
pr_err("request_irq failed for irq %d\n", irq);
|
||||
return NO_IRQ;
|
||||
}
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
static void __exit ptp_ixp_exit(void)
|
||||
{
|
||||
free_irq(MASTER_IRQ, &ixp_clock);
|
||||
free_irq(SLAVE_IRQ, &ixp_clock);
|
||||
ptp_clock_unregister(ixp_clock.ptp_clock);
|
||||
}
|
||||
|
||||
static int __init ptp_ixp_init(void)
|
||||
{
|
||||
if (!cpu_is_ixp46x())
|
||||
return -ENODEV;
|
||||
|
||||
ixp_clock.regs =
|
||||
(struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT;
|
||||
|
||||
ixp_clock.caps = ptp_ixp_caps;
|
||||
|
||||
ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps);
|
||||
|
||||
if (IS_ERR(ixp_clock.ptp_clock))
|
||||
return PTR_ERR(ixp_clock.ptp_clock);
|
||||
|
||||
__raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend);
|
||||
__raw_writel(1, &ixp_clock.regs->trgt_lo);
|
||||
__raw_writel(0, &ixp_clock.regs->trgt_hi);
|
||||
__raw_writel(TTIPEND, &ixp_clock.regs->event);
|
||||
|
||||
if (MASTER_IRQ != setup_interrupt(MASTER_GPIO)) {
|
||||
pr_err("failed to setup gpio %d as irq\n", MASTER_GPIO);
|
||||
goto no_master;
|
||||
}
|
||||
if (SLAVE_IRQ != setup_interrupt(SLAVE_GPIO)) {
|
||||
pr_err("failed to setup gpio %d as irq\n", SLAVE_GPIO);
|
||||
goto no_slave;
|
||||
}
|
||||
|
||||
return 0;
|
||||
no_slave:
|
||||
free_irq(MASTER_IRQ, &ixp_clock);
|
||||
no_master:
|
||||
ptp_clock_unregister(ixp_clock.ptp_clock);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
module_init(ptp_ixp_init);
|
||||
module_exit(ptp_ixp_exit);
|
||||
|
||||
MODULE_AUTHOR("Richard Cochran <richard.cochran@omicron.at>");
|
||||
MODULE_DESCRIPTION("PTP clock using the IXP46X timer");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue