ARM: OMAP4: MPUSS PM: remove unnecessary shim functions for powerdomain control
The OMAP4 MPU subsystem power management code contains several unnecessary shim functions for powerdomain control; remove them. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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@ -86,37 +86,6 @@ static inline void set_cpu_wakeup_addr(unsigned int cpu_id, u32 addr)
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__raw_writel(addr, pm_info->wkup_sar_addr);
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__raw_writel(addr, pm_info->wkup_sar_addr);
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}
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}
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/*
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* Set the CPUx powerdomain's previous power state
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*/
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static inline void set_cpu_next_pwrst(unsigned int cpu_id,
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unsigned int power_state)
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{
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struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
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pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
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}
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/*
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* Read CPU's previous power state
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*/
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static inline unsigned int read_cpu_prev_pwrst(unsigned int cpu_id)
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{
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struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
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return pwrdm_read_prev_pwrst(pm_info->pwrdm);
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}
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/*
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* Clear the CPUx powerdomain's previous power state
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*/
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static inline void clear_cpu_prev_pwrst(unsigned int cpu_id)
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{
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struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id);
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pwrdm_clear_all_prev_pwrst(pm_info->pwrdm);
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}
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/*
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/*
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* Store the SCU power status value to scratchpad memory
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* Store the SCU power status value to scratchpad memory
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*/
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*/
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@ -230,6 +199,7 @@ static void save_l2x0_context(void)
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*/
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*/
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int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
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int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
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{
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{
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struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
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unsigned int save_state = 0;
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unsigned int save_state = 0;
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unsigned int wakeup_cpu;
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unsigned int wakeup_cpu;
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@ -268,7 +238,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
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save_state = 2;
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save_state = 2;
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cpu_clear_prev_logic_pwrst(cpu);
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cpu_clear_prev_logic_pwrst(cpu);
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set_cpu_next_pwrst(cpu, power_state);
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pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
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set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume));
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set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume));
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scu_pwrst_prepare(cpu, power_state);
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scu_pwrst_prepare(cpu, power_state);
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l2x0_pwrst_prepare(cpu, save_state);
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l2x0_pwrst_prepare(cpu, save_state);
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@ -286,7 +256,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
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* domain transition
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* domain transition
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*/
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*/
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wakeup_cpu = smp_processor_id();
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wakeup_cpu = smp_processor_id();
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set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);
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pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON);
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pwrdm_post_transition(NULL);
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pwrdm_post_transition(NULL);
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@ -300,8 +270,8 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
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*/
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*/
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int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
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int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
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{
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{
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unsigned int cpu_state = 0;
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struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
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struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
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unsigned int cpu_state = 0;
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if (omap_rev() == OMAP4430_REV_ES1_0)
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if (omap_rev() == OMAP4430_REV_ES1_0)
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return -ENXIO;
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return -ENXIO;
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@ -309,8 +279,8 @@ int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
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if (power_state == PWRDM_POWER_OFF)
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if (power_state == PWRDM_POWER_OFF)
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cpu_state = 1;
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cpu_state = 1;
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clear_cpu_prev_pwrst(cpu);
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pwrdm_clear_all_prev_pwrst(pm_info->pwrdm);
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set_cpu_next_pwrst(cpu, power_state);
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pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
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set_cpu_wakeup_addr(cpu, virt_to_phys(pm_info->secondary_startup));
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set_cpu_wakeup_addr(cpu, virt_to_phys(pm_info->secondary_startup));
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scu_pwrst_prepare(cpu, power_state);
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scu_pwrst_prepare(cpu, power_state);
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@ -321,7 +291,7 @@ int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
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*/
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*/
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omap4_finish_suspend(cpu_state);
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omap4_finish_suspend(cpu_state);
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set_cpu_next_pwrst(cpu, PWRDM_POWER_ON);
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pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON);
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return 0;
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return 0;
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}
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}
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