drm/amdgpu: remove job->ring
We can easily get that from the scheduler. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1027,6 +1027,7 @@ struct amdgpu_cs_parser {
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/* scheduler job object */
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struct amdgpu_job *job;
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struct amdgpu_ring *ring;
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/* buffer objects */
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struct ww_acquire_ctx ticket;
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@ -912,11 +912,11 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
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{
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struct amdgpu_fpriv *fpriv = p->filp->driver_priv;
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struct amdgpu_vm *vm = &fpriv->vm;
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struct amdgpu_ring *ring = p->job->ring;
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struct amdgpu_ring *ring = p->ring;
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int r;
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/* Only for UVD/VCE VM emulation */
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if (p->job->ring->funcs->parse_cs) {
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if (p->ring->funcs->parse_cs) {
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unsigned i, j;
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for (i = 0, j = 0; i < p->nchunks && j < p->job->num_ibs; i++) {
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@ -1030,10 +1030,10 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
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}
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}
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if (parser->job->ring && parser->job->ring != ring)
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if (parser->ring && parser->ring != ring)
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return -EINVAL;
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parser->job->ring = ring;
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parser->ring = ring;
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r = amdgpu_ib_get(adev, vm,
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ring->funcs->parse_cs ? chunk_ib->ib_bytes : 0,
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@ -1052,11 +1052,11 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
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/* UVD & VCE fw doesn't support user fences */
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if (parser->job->uf_addr && (
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parser->job->ring->funcs->type == AMDGPU_RING_TYPE_UVD ||
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parser->job->ring->funcs->type == AMDGPU_RING_TYPE_VCE))
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parser->ring->funcs->type == AMDGPU_RING_TYPE_UVD ||
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parser->ring->funcs->type == AMDGPU_RING_TYPE_VCE))
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return -EINVAL;
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return amdgpu_ctx_wait_prev_fence(parser->ctx, parser->job->ring->idx);
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return amdgpu_ctx_wait_prev_fence(parser->ctx, parser->ring->idx);
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}
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static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
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@ -1207,7 +1207,7 @@ static void amdgpu_cs_post_dependencies(struct amdgpu_cs_parser *p)
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static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
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union drm_amdgpu_cs *cs)
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{
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struct amdgpu_ring *ring = p->job->ring;
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struct amdgpu_ring *ring = p->ring;
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struct drm_sched_entity *entity = &p->ctx->rings[ring->idx].entity;
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struct amdgpu_job *job;
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unsigned i;
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@ -1256,7 +1256,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
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job->uf_sequence = seq;
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amdgpu_job_free_resources(job);
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amdgpu_ring_priority_get(job->ring, job->base.s_priority);
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amdgpu_ring_priority_get(p->ring, job->base.s_priority);
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trace_amdgpu_cs_ioctl(job);
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drm_sched_entity_push_job(&job->base, entity);
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@ -3253,7 +3253,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
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kthread_park(ring->sched.thread);
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if (job && job->ring->idx != i)
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if (job && job->base.sched == &ring->sched)
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continue;
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drm_sched_hw_job_reset(&ring->sched, &job->base);
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@ -3277,7 +3277,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
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* or all rings (in the case @job is NULL)
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* after above amdgpu_reset accomplished
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*/
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if ((!job || job->ring->idx == i) && !r)
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if ((!job || job->base.sched == &ring->sched) && !r)
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drm_sched_job_recovery(&ring->sched);
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kthread_unpark(ring->sched.thread);
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@ -30,12 +30,12 @@
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static void amdgpu_job_timedout(struct drm_sched_job *s_job)
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{
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struct amdgpu_job *job = container_of(s_job, struct amdgpu_job, base);
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struct amdgpu_ring *ring = to_amdgpu_ring(s_job->sched);
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struct amdgpu_job *job = to_amdgpu_job(s_job);
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DRM_ERROR("ring %s timeout, last signaled seq=%u, last emitted seq=%u\n",
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job->base.sched->name,
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atomic_read(&job->ring->fence_drv.last_seq),
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job->ring->fence_drv.sync_seq);
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job->base.sched->name, atomic_read(&ring->fence_drv.last_seq),
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ring->fence_drv.sync_seq);
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amdgpu_device_gpu_recover(job->adev, job, false);
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}
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@ -98,9 +98,10 @@ void amdgpu_job_free_resources(struct amdgpu_job *job)
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static void amdgpu_job_free_cb(struct drm_sched_job *s_job)
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{
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struct amdgpu_job *job = container_of(s_job, struct amdgpu_job, base);
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struct amdgpu_ring *ring = to_amdgpu_ring(s_job->sched);
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struct amdgpu_job *job = to_amdgpu_job(s_job);
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amdgpu_ring_priority_put(job->ring, s_job->s_priority);
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amdgpu_ring_priority_put(ring, s_job->s_priority);
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dma_fence_put(job->fence);
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amdgpu_sync_free(&job->sync);
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amdgpu_sync_free(&job->sched_sync);
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@ -120,6 +121,7 @@ void amdgpu_job_free(struct amdgpu_job *job)
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int amdgpu_job_submit(struct amdgpu_job *job, struct drm_sched_entity *entity,
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void *owner, struct dma_fence **f)
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{
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struct amdgpu_ring *ring = to_amdgpu_ring(entity->sched);
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int r;
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if (!f)
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@ -130,10 +132,9 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct drm_sched_entity *entity,
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return r;
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job->owner = owner;
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job->ring = to_amdgpu_ring(entity->sched);
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*f = dma_fence_get(&job->base.s_fence->finished);
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amdgpu_job_free_resources(job);
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amdgpu_ring_priority_get(job->ring, job->base.s_priority);
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amdgpu_ring_priority_get(ring, job->base.s_priority);
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drm_sched_entity_push_job(&job->base, entity);
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return 0;
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@ -142,6 +143,7 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct drm_sched_entity *entity,
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static struct dma_fence *amdgpu_job_dependency(struct drm_sched_job *sched_job,
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struct drm_sched_entity *s_entity)
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{
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struct amdgpu_ring *ring = to_amdgpu_ring(s_entity->sched);
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struct amdgpu_job *job = to_amdgpu_job(sched_job);
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struct amdgpu_vm *vm = job->vm;
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bool explicit = false;
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@ -157,8 +159,6 @@ static struct dma_fence *amdgpu_job_dependency(struct drm_sched_job *sched_job,
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}
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while (fence == NULL && vm && !job->vmid) {
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struct amdgpu_ring *ring = job->ring;
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r = amdgpu_vmid_grab(vm, ring, &job->sync,
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&job->base.s_fence->finished,
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job);
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@ -173,6 +173,7 @@ static struct dma_fence *amdgpu_job_dependency(struct drm_sched_job *sched_job,
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static struct dma_fence *amdgpu_job_run(struct drm_sched_job *sched_job)
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{
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struct amdgpu_ring *ring = to_amdgpu_ring(sched_job->sched);
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struct dma_fence *fence = NULL, *finished;
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struct amdgpu_device *adev;
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struct amdgpu_job *job;
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@ -196,7 +197,7 @@ static struct dma_fence *amdgpu_job_run(struct drm_sched_job *sched_job)
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if (finished->error < 0) {
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DRM_INFO("Skip scheduling IBs!\n");
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} else {
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r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job,
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r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job,
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&fence);
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if (r)
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DRM_ERROR("Error scheduling IBs (%d)\n", r);
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@ -37,7 +37,6 @@ struct amdgpu_job {
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struct drm_sched_job base;
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struct amdgpu_device *adev;
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struct amdgpu_vm *vm;
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struct amdgpu_ring *ring;
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struct amdgpu_sync sync;
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struct amdgpu_sync sched_sync;
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struct amdgpu_ib *ibs;
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@ -150,10 +150,10 @@ TRACE_EVENT(amdgpu_cs,
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TP_fast_assign(
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__entry->bo_list = p->bo_list;
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__entry->ring = p->job->ring->idx;
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__entry->ring = p->ring->idx;
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__entry->dw = p->job->ibs[i].length_dw;
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__entry->fences = amdgpu_fence_count_emitted(
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p->job->ring);
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p->ring);
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),
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TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
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__entry->bo_list, __entry->ring, __entry->dw,
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@ -178,7 +178,7 @@ TRACE_EVENT(amdgpu_cs_ioctl,
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__assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
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__entry->context = job->base.s_fence->finished.context;
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__entry->seqno = job->base.s_fence->finished.seqno;
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__entry->ring_name = job->ring->name;
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__entry->ring_name = to_amdgpu_ring(job->base.sched)->name;
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__entry->num_ibs = job->num_ibs;
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),
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TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
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@ -203,7 +203,7 @@ TRACE_EVENT(amdgpu_sched_run_job,
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__assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
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__entry->context = job->base.s_fence->finished.context;
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__entry->seqno = job->base.s_fence->finished.seqno;
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__entry->ring_name = job->ring->name;
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__entry->ring_name = to_amdgpu_ring(job->base.sched)->name;
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__entry->num_ibs = job->num_ibs;
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),
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TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
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@ -692,11 +692,11 @@ static int amdgpu_uvd_cs_msg(struct amdgpu_uvd_cs_ctx *ctx,
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struct amdgpu_bo *bo, unsigned offset)
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{
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struct amdgpu_device *adev = ctx->parser->adev;
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uint32_t ip_instance = ctx->parser->ring->me;
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int32_t *msg, msg_type, handle;
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void *ptr;
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long r;
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int i;
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uint32_t ip_instance = ctx->parser->job->ring->me;
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if (offset & 0x3F) {
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DRM_ERROR("UVD(%d) messages must be 64 byte aligned!\n", ip_instance);
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