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drm/amdgpu: bypass vce clock if vce is idle on Fiji. 

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Rex Zhu 2016-09-24 16:34:59 +08:00 committed by Alex Deucher
parent 05dcb5c888
commit 3374dcebb8
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
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@ -716,7 +716,8 @@ static int vce_v3_0_set_clockgating_state(void *handle,
int i;
if ((adev->asic_type == CHIP_POLARIS10) ||
(adev->asic_type == CHIP_TONGA))
(adev->asic_type == CHIP_TONGA) ||
(adev->asic_type == CHIP_FIJI))
vce_v3_0_set_bypass_mode(adev, enable);
if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG))