This PR contains both core and drivers fixes for 4.13.
Core fixes: - Fix data interface setup for ONFI NANDs that do not support the SET FEATURES command - Fix a kernel doc header - Fix potential integer overflow when retrieving timing information from the parameter page - Fix wrong OOB layout for small page NANDs Driver fixes: - Fix potential division-by-zero bug - Fix backward compat with old atmel-nand DT bindings - Fix ->setup_data_interface() in the atmel NAND driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZgY0wAAoJEGXtNgF+CLcA9REP/2sbMErlhOISdMaL/s5mkmYd IhnncfIxFx/FIbAcKv7C5Q0VgG/5iutkj2Z3m9kNsi2lbcRHX0sb2Z4RV8aB4c1o WQz0349OtZs83ck0Eh5R+v5NZE16l06P3ClMOD0oEHkwgqsNbTlU292fYjsxk0rM IFsbTxVxGyFIf0rmsqluwX7MZAS5bnv8fKH7Bgz8MmVz2xg+UDZrc6P0ntJyBqcE U7Oc/hOnpRR4UjGWyAlk0373pITisH0YeYIHfj+yD8ynumGGSoB1+mtb78jIVRAw Pe47wvZCEZJIPoLs9+hVVWLA/DII+0oBy2or3xqN3f3Z/orGOn1XhTqzuC069wSM O3TR8jg/84DVN1QvEebtX+QsP2P2ASUE6eO7RCWlWUlB47Xl+vP9cKsK1KLxa0N4 ZfMX320vlZNfC2IQL41OZcBh5V20WtnzA7jTwD/GreDu7FMV/u4lpNyZRT5ROOsR nRUvjgtXfr7lWiEi3aXEjqp/X5E8/DrKfTzWsotaoVV2CdVQ9qGIvcJymXlQohVl ursqEqAct60RBxCqwaKuNvWbnDHjOw1WwD2No23nJ1mHFaTBdo/PSrU20EsLYMtv J6TuoclGekKH8WSTEHzlQidEoyeO8MraedO6fs1pjAiflWFuVI3Zhs6MO4fE+ouj mJnsSXia5LDV02icDlTE =16Sl -----END PGP SIGNATURE----- Merge tag 'nand/fixes-for-4.13-rc4' of git://git.infradead.org/l2-mtd into MTD """ This PR contains both core and drivers fixes for 4.13. Core fixes: - Fix data interface setup for ONFI NANDs that do not support the SET FEATURES command - Fix a kernel doc header - Fix potential integer overflow when retrieving timing information from the parameter page - Fix wrong OOB layout for small page NANDs Driver fixes: - Fix potential division-by-zero bug - Fix backward compat with old atmel-nand DT bindings - Fix ->setup_data_interface() in the atmel NAND driver """
This commit is contained in:
commit
33983675fb
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@ -1201,7 +1201,7 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,
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* tRC < 30ns implies EDO mode. This controller does not support this
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* mode.
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*/
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if (conf->timings.sdr.tRC_min < 30)
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if (conf->timings.sdr.tRC_min < 30000)
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return -ENOTSUPP;
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atmel_smc_cs_conf_init(smcconf);
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@ -945,6 +945,7 @@ struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev)
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*/
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struct platform_device *pdev = to_platform_device(userdev);
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const struct atmel_pmecc_caps *caps;
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const struct of_device_id *match;
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/* No PMECC engine available. */
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if (!of_property_read_bool(userdev->of_node,
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@ -953,21 +954,11 @@ struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev)
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caps = &at91sam9g45_caps;
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/*
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* Try to find the NFC subnode and extract the associated caps
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* from there.
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*/
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np = of_find_compatible_node(userdev->of_node, NULL,
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"atmel,sama5d3-nfc");
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if (np) {
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const struct of_device_id *match;
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match = of_match_node(atmel_pmecc_legacy_match, np);
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if (match && match->data)
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caps = match->data;
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of_node_put(np);
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}
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/* Find the caps associated to the NAND dev node. */
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match = of_match_node(atmel_pmecc_legacy_match,
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userdev->of_node);
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if (match && match->data)
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caps = match->data;
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pmecc = atmel_pmecc_create(pdev, caps, 1, 2);
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}
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@ -65,8 +65,14 @@ static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section,
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if (!section) {
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oobregion->offset = 0;
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oobregion->length = 4;
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if (mtd->oobsize == 16)
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oobregion->length = 4;
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else
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oobregion->length = 3;
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} else {
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if (mtd->oobsize == 8)
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return -ERANGE;
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oobregion->offset = 6;
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oobregion->length = ecc->total - 4;
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}
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@ -1125,7 +1131,9 @@ static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
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* Ensure the timing mode has been changed on the chip side
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* before changing timings on the controller side.
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*/
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if (chip->onfi_version) {
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if (chip->onfi_version &&
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(le16_to_cpu(chip->onfi_params.opt_cmd) &
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ONFI_OPT_CMD_SET_GET_FEATURES)) {
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u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
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chip->onfi_timing_mode_default,
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};
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@ -2741,7 +2749,6 @@ static int nand_write_page_syndrome(struct mtd_info *mtd,
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* @buf: the data to write
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* @oob_required: must write chip->oob_poi to OOB
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* @page: page number to write
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* @cached: cached programming
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* @raw: use _raw version of write_page
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*/
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static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
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@ -311,9 +311,9 @@ int onfi_init_data_interface(struct nand_chip *chip,
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struct nand_sdr_timings *timings = &iface->timings.sdr;
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/* microseconds -> picoseconds */
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timings->tPROG_max = 1000000UL * le16_to_cpu(params->t_prog);
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timings->tBERS_max = 1000000UL * le16_to_cpu(params->t_bers);
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timings->tR_max = 1000000UL * le16_to_cpu(params->t_r);
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timings->tPROG_max = 1000000ULL * le16_to_cpu(params->t_prog);
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timings->tBERS_max = 1000000ULL * le16_to_cpu(params->t_bers);
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timings->tR_max = 1000000ULL * le16_to_cpu(params->t_r);
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/* nanoseconds -> picoseconds */
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timings->tCCS_min = 1000UL * le16_to_cpu(params->t_ccs);
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@ -1728,6 +1728,10 @@ static int sunxi_nfc_setup_data_interface(struct mtd_info *mtd, int csline,
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*/
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chip->clk_rate = NSEC_PER_SEC / min_clk_period;
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real_clk_rate = clk_round_rate(nfc->mod_clk, chip->clk_rate);
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if (real_clk_rate <= 0) {
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dev_err(nfc->dev, "Unable to round clk %lu\n", chip->clk_rate);
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return -EINVAL;
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}
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/*
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* ONFI specification 3.1, paragraph 4.15.2 dictates that EDO data
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@ -681,10 +681,10 @@ struct nand_buffers {
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* @tWW_min: WP# transition to WE# low
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*/
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struct nand_sdr_timings {
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u32 tBERS_max;
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u64 tBERS_max;
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u32 tCCS_min;
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u32 tPROG_max;
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u32 tR_max;
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u64 tPROG_max;
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u64 tR_max;
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u32 tALH_min;
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u32 tADL_min;
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u32 tALS_min;
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