[POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround
Add a workaround for PowerPC 440EPx/GRx incorrect write to DDR SDRAM errata. Data can be written to wrong address in SDRAM when write pipelining enabled on plb0. We disable it in the cpu_setup for these processors at early init. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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@ -20,7 +20,14 @@
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_GLOBAL(__setup_cpu_440ep)
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_GLOBAL(__setup_cpu_440ep)
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b __init_fpu_44x
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b __init_fpu_44x
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_GLOBAL(__setup_cpu_440epx)
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_GLOBAL(__setup_cpu_440epx)
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b __init_fpu_44x
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mflr r4
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bl __init_fpu_44x
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bl __plb_disable_wrp
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mtlr r4
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blr
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_GLOBAL(__setup_cpu_440grx)
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b __plb_disable_wrp
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/* enable APU between CPU and FPU */
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/* enable APU between CPU and FPU */
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_GLOBAL(__init_fpu_44x)
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_GLOBAL(__init_fpu_44x)
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@ -31,3 +38,19 @@ _GLOBAL(__init_fpu_44x)
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isync
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isync
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blr
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blr
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/*
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* Workaround for the incorrect write to DDR SDRAM errata.
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* The write address can be corrupted during writes to
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* DDR SDRAM when write pipelining is enabled on PLB0.
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* Disable write pipelining here.
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*/
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#define DCRN_PLB4A0_ACR 0x81
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_GLOBAL(__plb_disable_wrp)
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mfdcr r3,DCRN_PLB4A0_ACR
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/* clear WRP bit in PLB4A0_ACR */
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rlwinm r3,r3,0,8,6
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mtdcr DCRN_PLB4A0_ACR,r3
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isync
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blr
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@ -33,6 +33,7 @@ EXPORT_SYMBOL(cur_cpu_spec);
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#ifdef CONFIG_PPC32
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#ifdef CONFIG_PPC32
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extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
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@ -1146,6 +1147,8 @@ static struct cpu_spec cpu_specs[] = {
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.cpu_user_features = COMMON_USER_BOOKE,
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.cpu_user_features = COMMON_USER_BOOKE,
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.icache_bsize = 32,
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.dcache_bsize = 32,
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.cpu_setup = __setup_cpu_440grx,
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.platform = "ppc440",
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},
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},
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{ /* 440GP Rev. B */
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{ /* 440GP Rev. B */
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.pvr_mask = 0xf0000fff,
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.pvr_mask = 0xf0000fff,
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